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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +01002/*
3 * (C) Copyright 2007-2013
4 * Stelian Pop <stelian.pop@leadtechdesign.com>
5 * Lead Tech Design <www.leadtechdesign.com>
6 * Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com>
7 * Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
8 *
9 * Settings for Calao USB-A9263 board
10 *
11 * U-Boot image has to be less than 200704 bytes, otherwise at91bootstrap
12 * installed on board will not be able to load it properly.
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010013 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17#include <asm/hardware.h>
18
19/* ARM asynchronous clock */
20#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
21#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010022
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010023/*
24 * Hardware drivers
25 */
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010026
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010027/* SDRAM */
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010028#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
29#define CONFIG_SYS_SDRAM_SIZE 0x04000000
30
31#define CONFIG_SYS_INIT_SP_ADDR \
Wenyou.Yang@microchip.comd5d29162017-07-21 17:07:46 +080032 (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010033
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010034/* NAND flash */
35#ifdef CONFIG_CMD_NAND
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010036#define CONFIG_SYS_MAX_NAND_DEVICE 1
37#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
38/* our ALE is AD21 */
39#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
40/* our CLE is AD22 */
41#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
42#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15)
43#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22)
44#endif
45
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010046/* USB */
47#ifdef CONFIG_CMD_USB
48#define CONFIG_USB_ATMEL
49#define CONFIG_USB_OHCI_NEW
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010050#define CONFIG_SYS_USB_OHCI_CPU_INIT
51#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
52#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
53#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010054#endif
55
Wenyou.Yang@microchip.comd5d29162017-07-21 17:07:46 +080056/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010057#define CONFIG_EXTRA_ENV_SETTINGS \
Tom Rini5ad8e112017-10-22 17:55:07 -040058 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010059
Mateusz Kulikowski6a302ae2013-12-02 23:30:58 +010060#endif