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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Patrice Chotard73ef2f02017-12-12 09:49:44 +01002/*
3 * Copyright (C) STMicroelectronics SA 2017
4 * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
Patrice Chotard73ef2f02017-12-12 09:49:44 +01005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
Patrice Chotard73ef2f02017-12-12 09:49:44 +010010#define CONFIG_SYS_FLASH_BASE 0x08000000
11
12#define CONFIG_SYS_INIT_SP_ADDR 0x10010000
Patrice Chotard73ef2f02017-12-12 09:49:44 +010013
Patrice Chotard73ef2f02017-12-12 09:49:44 +010014/*
15 * Configuration of the external SDRAM memory
16 */
Patrice Chotard73ef2f02017-12-12 09:49:44 +010017#define CONFIG_SYS_LOAD_ADDR 0x00400000
18#define CONFIG_LOADADDR 0x00400000
19
20#define CONFIG_SYS_MAX_FLASH_SECT 12
21#define CONFIG_SYS_MAX_FLASH_BANKS 2
22
Patrice Chotard73ef2f02017-12-12 09:49:44 +010023#define CONFIG_STM32_FLASH
24
Patrice Chotard73ef2f02017-12-12 09:49:44 +010025#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
26
27#define CONFIG_CMDLINE_TAG
28#define CONFIG_SETUP_MEMORY_TAGS
29#define CONFIG_INITRD_TAG
30#define CONFIG_REVISION_TAG
31
32#define CONFIG_SYS_CBSIZE 1024
33
34#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
35
Patrice Chotard1e719da2018-08-03 11:46:20 +020036#define BOOT_TARGET_DEVICES(func) \
37 func(MMC, mmc, 0)
Patrice Chotard73ef2f02017-12-12 09:49:44 +010038
Patrice Chotard1e719da2018-08-03 11:46:20 +020039#include <config_distro_bootcmd.h>
40#define CONFIG_EXTRA_ENV_SETTINGS \
41 "kernel_addr_r=0x00008000\0" \
42 "fdtfile=stm32f469-disco.dtb\0" \
43 "fdt_addr_r=0x00700000\0" \
44 "scriptaddr=0x00800000\0" \
45 "pxefile_addr_r=0x00800000\0" \
46 "fdt_high=0xffffffffffffffff\0" \
47 "initrd_high=0xffffffffffffffff\0" \
48 "ramdisk_addr_r=0x00900000\0" \
49 BOOTENV
Patrice Chotard73ef2f02017-12-12 09:49:44 +010050
51/*
52 * Command line configuration.
53 */
Patrice Chotard73ef2f02017-12-12 09:49:44 +010054
55#endif /* __CONFIG_H */