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git01.mediatek.com / filogic / uboot / c9285bf61ab39091553fce5c8871797a55f31f07 / . / configs / zynq_picozed_defconfig
blob: 09d78dc8baa66a1d10378037045674fb147e53a6 [file] [log] [blame]
Nathan Rossi0f4011a2015-04-14 14:58:10 +1000[diff] [blame]1CONFIG_ARM=y
Masahiro Yamada8204bd12015-03-16 16:43:24 +0900[diff] [blame]2CONFIG_ARCH_ZYNQ=y
Michal Simek92543872016-12-16 11:57:17 +0100[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x4000000
Michal Simekc7abf8d2017-12-01 13:50:33 +0100[diff] [blame]4CONFIG_SPL_STACK_R_ADDR=0x200000
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame^]5CONFIG_SPL=y
Michal Simek8a0e11c2018-01-09 19:31:16 +0100[diff] [blame]6CONFIG_DISTRO_DEFAULTS=y
Michal Simekc7abf8d2017-12-01 13:50:33 +0100[diff] [blame]7CONFIG_SPL_STACK_R=y
Heiko Schocher1d12ba22016-10-06 07:55:15 +0200[diff] [blame]8CONFIG_SPL_OS_BOOT=y
Siva Durga Prasad Paladugu59d461e2016-01-11 12:01:10 +0530[diff] [blame]9CONFIG_SYS_PROMPT="Zynq> "
Simon Glassa18b9692017-08-04 16:34:57 -0600[diff] [blame]10CONFIG_CMD_THOR_DOWNLOAD=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]11CONFIG_CMD_DFU=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]12# CONFIG_CMD_FLASH is not set
Simon Glass80cb1892017-05-17 03:25:21 -0600[diff] [blame]13CONFIG_CMD_FPGA_LOADBP=y
14CONFIG_CMD_FPGA_LOADFS=y
15CONFIG_CMD_FPGA_LOADMK=y
16CONFIG_CMD_FPGA_LOADP=y
Thomas Chou3a077cd2015-11-11 21:39:33 +0800[diff] [blame]17CONFIG_CMD_GPIO=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]18CONFIG_CMD_MMC=y
19CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]20# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]21CONFIG_CMD_TFTPPUT=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]22CONFIG_CMD_CACHE=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]23CONFIG_CMD_EXT4_WRITE=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]24CONFIG_DEFAULT_DEVICE_TREE="zynq-picozed"
Masahiro Yamada88e2e362015-07-17 20:26:06 +0900[diff] [blame]25CONFIG_NET_RANDOM_ETHADDR=y
Nathan Rossidd71c8a2016-01-08 03:00:46 +1000[diff] [blame]26CONFIG_SPL_DM_SEQ_ALIAS=y
Tom Rini265c7da2016-09-19 13:31:30 -0400[diff] [blame]27CONFIG_DFU_MMC=y
28CONFIG_DFU_RAM=y
Michal Simek216f6372017-11-03 15:53:56 +0100[diff] [blame]29CONFIG_FPGA_XILINX=y
Vipul Kumar4a4946b2018-02-16 18:02:51 +0530[diff] [blame]30CONFIG_FPGA_ZYNQPL=y
Michal Simek846d61b2018-01-09 15:27:31 +0100[diff] [blame]31CONFIG_DM_GPIO=y
Masahiro Yamada7db8c172016-12-07 22:10:28 +0900[diff] [blame]32CONFIG_MMC_SDHCI=y
Michal Simek19abc1d2017-02-10 13:57:35 +0100[diff] [blame]33CONFIG_MMC_SDHCI_ZYNQ=y
Vipul Kumar603ca6d2018-01-24 10:51:30 +0530[diff] [blame]34CONFIG_PHY_MARVELL=y
35CONFIG_PHY_REALTEK=y
36CONFIG_PHY_XILINX=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]37CONFIG_MII=y
Michal Simek3d7285f2015-11-30 14:34:52 +0100[diff] [blame]38CONFIG_ZYNQ_GEM=y
Michal Simekab754532017-11-06 09:16:05 +0100[diff] [blame]39CONFIG_ZYNQ_SERIAL=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]40CONFIG_USB=y
Siva Durga Prasad Paladugu42fcc182016-07-22 14:51:51 +0530[diff] [blame]41CONFIG_USB_EHCI_HCD=y
Mateusz Kulikowski533e7b12016-03-31 23:12:19 +0200[diff] [blame]42CONFIG_USB_ULPI_VIEWPORT=y
Sam Protsenkob4a0bf72016-04-13 14:20:25 +0300[diff] [blame]43CONFIG_USB_ULPI=y
Michal Simekb9c5d132016-07-27 15:08:03 +0200[diff] [blame]44CONFIG_USB_GADGET=y
Maxime Ripard7f78b9d2017-09-07 08:58:08 +0200[diff] [blame]45CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
46CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
47CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
Sam Protsenkob4a0bf72016-04-13 14:20:25 +0300[diff] [blame]48CONFIG_CI_UDC=y
Sam Protsenko4d2439d2016-04-13 14:20:26 +0300[diff] [blame]49CONFIG_USB_GADGET_DOWNLOAD=y
Lukasz Majewski3c32b422018-01-29 19:30:18 +0100[diff] [blame]50CONFIG_USB_FUNCTION_THOR=y