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git01.mediatek.com / filogic / uboot / c9285bf61ab39091553fce5c8871797a55f31f07 / . / configs / trimslice_defconfig
blob: b838f4d7db58c24e969aa49009b461f4c5ff62f5 [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
2CONFIG_TEGRA=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x00110000
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame^]4CONFIG_NR_DRAM_BANKS=2
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]5CONFIG_TEGRA20=y
6CONFIG_TARGET_TRIMSLICE=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]7CONFIG_OF_SYSTEM_SETUP=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]8CONFIG_CONSOLE_MUX=y
Simon Glass3110ece2016-10-17 20:13:02 -0600[diff] [blame]9CONFIG_SYS_STDIO_DEREGISTER=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]10CONFIG_SYS_PROMPT="Tegra20 (TrimSlice) # "
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]11# CONFIG_CMD_IMI is not set
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]12# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]13CONFIG_CMD_GPIO=y
14CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]15CONFIG_CMD_MMC=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]16CONFIG_CMD_PCI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]17CONFIG_CMD_SF=y
18CONFIG_CMD_SPI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]19CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]20# CONFIG_CMD_SETEXPR is not set
21# CONFIG_CMD_NFS is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]22CONFIG_CMD_EXT4_WRITE=y
Patrick Delaunayf7e07722017-01-27 11:00:37 +0100[diff] [blame]23# CONFIG_SPL_DOS_PARTITION is not set
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +0100[diff] [blame]24# CONFIG_SPL_EFI_PARTITION is not set
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]25CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]26CONFIG_ENV_IS_IN_SPI_FLASH=y
Patrick Delaunayf8e932e2019-02-27 15:20:38 +0100[diff] [blame]27CONFIG_USE_ENV_SPI_MAX_HZ=y
28CONFIG_ENV_SPI_MAX_HZ=48000000
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]29CONFIG_SPL_DM=y
Tom Rini41b6dc92019-02-22 10:17:41 -0500[diff] [blame]30CONFIG_SYS_I2C_TEGRA=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]31CONFIG_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]32CONFIG_SF_DEFAULT_MODE=0
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]33CONFIG_SPI_FLASH_WINBOND=y
Bin Meng29971222016-03-21 06:47:42 -0700[diff] [blame]34CONFIG_RTL8169=y
Tom Rinif48e0252016-10-26 17:15:37 -0400[diff] [blame]35CONFIG_PCI=y
36CONFIG_DM_PCI=y
37CONFIG_DM_PCI_COMPAT=y
Simon Glassc78e3272015-11-19 20:26:55 -0700[diff] [blame]38CONFIG_PCI_TEGRA=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]39CONFIG_SYS_NS16550=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]40CONFIG_TEGRA20_SFLASH=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]41CONFIG_USB=y
42CONFIG_DM_USB=y
Tom Rini7716cd62017-05-12 22:33:28 -0400[diff] [blame]43CONFIG_USB_EHCI_HCD=y
Peter Robinson43ecef42019-02-20 12:17:27 +0000[diff] [blame]44CONFIG_USB_EHCI_TEGRA=y
Chris Packham547cf412017-08-28 20:50:45 +1200[diff] [blame]45CONFIG_USB_HOST_ETHER=y
Chris Packhamb110e112017-08-28 20:50:46 +1200[diff] [blame]46CONFIG_USB_ETHER_ASIX=y