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git01.mediatek.com / filogic / uboot / c9285bf61ab39091553fce5c8871797a55f31f07 / . / configs / snow_defconfig
blob: 3e3f020a730cccd77ed698bd6e16894660253ddb [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
Tom Rini443b5162017-01-12 13:16:02 -0500[diff] [blame]2# CONFIG_SPL_USE_ARCH_MEMCPY is not set
3# CONFIG_SPL_USE_ARCH_MEMSET is not set
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]4CONFIG_ARCH_EXYNOS=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]5CONFIG_SYS_TEXT_BASE=0x43E00000
Thomas Abrahama99ad392016-04-23 22:18:12 +0530[diff] [blame]6CONFIG_ARCH_EXYNOS5=y
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]7CONFIG_TARGET_SNOW=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame^]8CONFIG_NR_DRAM_BANKS=8
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]9CONFIG_SPL=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]10CONFIG_DEBUG_UART_BASE=0x12c30000
11CONFIG_DEBUG_UART_CLOCK=100000000
Siva Durga Prasad Paladugu809438d2016-07-29 15:31:47 +0530[diff] [blame]12CONFIG_IDENT_STRING=" for snow"
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]13CONFIG_DEBUG_UART=y
Tom Rini8db91cf2016-11-29 09:14:57 -0500[diff] [blame]14CONFIG_DISTRO_DEFAULTS=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]15CONFIG_FIT=y
16CONFIG_FIT_BEST_MATCH=y
Simon Glass4458d3b2016-10-17 20:12:35 -0600[diff] [blame]17CONFIG_SILENT_CONSOLE=y
Tom Rini623d67e2018-02-06 12:15:38 -0500[diff] [blame]18# CONFIG_SPL_FRAMEWORK is not set
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]19CONFIG_SYS_PROMPT="snow # "
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]20CONFIG_CMD_GPIO=y
21CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]22CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]23CONFIG_CMD_SF=y
24CONFIG_CMD_SPI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]25CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]26# CONFIG_CMD_SETEXPR is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]27CONFIG_CMD_CACHE=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]28CONFIG_CMD_TIME=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]29CONFIG_CMD_SOUND=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]30CONFIG_CMD_PMIC=y
31CONFIG_CMD_REGULATOR=y
Simon Glass8b6216a2015-08-22 18:31:20 -0600[diff] [blame]32CONFIG_CMD_TPM=y
Simon Glass81ab5472015-08-22 18:31:43 -0600[diff] [blame]33CONFIG_CMD_TPM_TEST=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]34CONFIG_CMD_EXT4_WRITE=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]35CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]36CONFIG_ENV_IS_IN_SPI_FLASH=y
Patrick Delaunayf8e932e2019-02-27 15:20:38 +0100[diff] [blame]37CONFIG_USE_ENV_SPI_BUS=y
38CONFIG_ENV_SPI_BUS=1
Simon Glass76fc3ad2015-08-03 08:19:28 -0600[diff] [blame]39CONFIG_I2C_CROS_EC_LDO=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]40CONFIG_I2C_MUX=y
41CONFIG_I2C_ARB_GPIO_CHALLENGE=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]42CONFIG_CROS_EC_KEYB=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]43CONFIG_CROS_EC=y
44CONFIG_CROS_EC_I2C=y
Masahiro Yamada7942e912017-01-10 13:32:04 +0900[diff] [blame]45CONFIG_MMC_DW=y
Masahiro Yamada7db8c172016-12-07 22:10:28 +0900[diff] [blame]46CONFIG_MMC_SDHCI=y
Masahiro Yamada124f6ce2016-12-07 22:10:29 +0900[diff] [blame]47CONFIG_MMC_SDHCI_S5P=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]48CONFIG_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]49CONFIG_SF_DEFAULT_MODE=0
50CONFIG_SF_DEFAULT_SPEED=50000000
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]51CONFIG_SPI_FLASH_GIGADEVICE=y
52CONFIG_SPI_FLASH_WINBOND=y
Adam Ford0a044f82017-09-05 15:20:44 -0500[diff] [blame]53CONFIG_SMC911X=y
54CONFIG_SMC911X_BASE=0x5000000
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]55CONFIG_DM_PMIC=y
56CONFIG_DM_PMIC_MAX77686=y
Simon Glass76fc3ad2015-08-03 08:19:28 -0600[diff] [blame]57CONFIG_PMIC_S5M8767=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]58CONFIG_PMIC_TPS65090=y
59CONFIG_DM_REGULATOR=y
60CONFIG_DM_REGULATOR_MAX77686=y
Simon Glass76fc3ad2015-08-03 08:19:28 -0600[diff] [blame]61CONFIG_REGULATOR_S5M8767=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]62CONFIG_REGULATOR_TPS65090=y
Simon Glassa1015ad2016-02-21 21:09:01 -0700[diff] [blame]63CONFIG_DM_PWM=y
64CONFIG_PWM_EXYNOS=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]65CONFIG_DEBUG_UART_S5P=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]66CONFIG_SOUND=y
67CONFIG_I2S=y
68CONFIG_I2S_SAMSUNG=y
69CONFIG_SOUND_MAX98095=y
70CONFIG_SOUND_WM8994=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]71CONFIG_EXYNOS_SPI=y
Christophe Ricard8759ff82015-10-06 22:54:41 +0200[diff] [blame]72CONFIG_TPM_TIS_INFINEON=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]73CONFIG_USB=y
74CONFIG_DM_USB=y
Sjoerd Simons4228ea62017-01-10 14:36:17 +0100[diff] [blame]75CONFIG_USB_XHCI_HCD=y
76CONFIG_USB_XHCI_DWC3=y
Tom Rini7716cd62017-05-12 22:33:28 -0400[diff] [blame]77CONFIG_USB_EHCI_HCD=y
Chris Packham547cf412017-08-28 20:50:45 +1200[diff] [blame]78CONFIG_USB_HOST_ETHER=y
Chris Packhamb110e112017-08-28 20:50:46 +1200[diff] [blame]79CONFIG_USB_ETHER_ASIX88179=y
Simon Glassa1015ad2016-02-21 21:09:01 -0700[diff] [blame]80CONFIG_DM_VIDEO=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]81CONFIG_VIDCONSOLE_AS_LCD=y
Simon Glassa1015ad2016-02-21 21:09:01 -0700[diff] [blame]82CONFIG_DISPLAY=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]83CONFIG_VIDEO_BRIDGE=y
84CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
85CONFIG_VIDEO_BRIDGE_NXP_PTN3460=y
Simon Glass169bb3b2016-10-17 20:12:56 -0600[diff] [blame]86CONFIG_LCD=y
Simon Glass8b6216a2015-08-22 18:31:20 -0600[diff] [blame]87CONFIG_TPM=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]88CONFIG_ERRNO_STR=y