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Christian Riesch588c6782011-11-28 23:46:17 +00001/*
2 * Pinmux configurations for the DA850 SoCs
3 *
4 * Copyright (C) 2011 OMICRON electronics GmbH
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <common.h>
22#include <asm/arch/davinci_misc.h>
23#include <asm/arch/hardware.h>
24#include <asm/arch/pinmux_defs.h>
25
26/* SPI pin muxer settings */
27const struct pinmux_config spi1_pins_base[] = {
28 { pinmux(5), 1, 2 }, /* SPI1_CLK */
29 { pinmux(5), 1, 4 }, /* SPI1_SOMI */
30 { pinmux(5), 1, 5 }, /* SPI1_SIMO */
31};
32
33const struct pinmux_config spi1_pins_scs0[] = {
34 { pinmux(5), 1, 1 }, /* SPI1_SCS[0] */
35};
36
37/* UART pin muxer settings */
Heiko Schocherc8f2b6b2011-11-29 02:33:44 +000038const struct pinmux_config uart1_pins_txrx[] = {
39 { pinmux(4), 2, 6 }, /* UART1_RXD */
40 { pinmux(4), 2, 7 }, /* UART1_TXD */
41};
42
Christian Riesch588c6782011-11-28 23:46:17 +000043const struct pinmux_config uart2_pins_txrx[] = {
44 { pinmux(4), 2, 4 }, /* UART2_RXD */
45 { pinmux(4), 2, 5 }, /* UART2_TXD */
46};
47
48const struct pinmux_config uart2_pins_rtscts[] = {
49 { pinmux(0), 4, 6 }, /* UART2_RTS */
50 { pinmux(0), 4, 7 }, /* UART2_CTS */
51};
52
53/* EMAC pin muxer settings*/
54const struct pinmux_config emac_pins_rmii[] = {
55 { pinmux(14), 8, 2 }, /* RMII_TXD[1] */
56 { pinmux(14), 8, 3 }, /* RMII_TXD[0] */
57 { pinmux(14), 8, 4 }, /* RMII_TXEN */
58 { pinmux(14), 8, 5 }, /* RMII_RXD[1] */
59 { pinmux(14), 8, 6 }, /* RMII_RXD[0] */
60 { pinmux(14), 8, 7 }, /* RMII_RXER */
61 { pinmux(15), 8, 1 }, /* RMII_CRS_DV */
62};
63
64const struct pinmux_config emac_pins_mii[] = {
65 { pinmux(2), 8, 1 }, /* MII_TXEN */
66 { pinmux(2), 8, 2 }, /* MII_TXCLK */
67 { pinmux(2), 8, 3 }, /* MII_COL */
68 { pinmux(2), 8, 4 }, /* MII_TXD[3] */
69 { pinmux(2), 8, 5 }, /* MII_TXD[2] */
70 { pinmux(2), 8, 6 }, /* MII_TXD[1] */
71 { pinmux(2), 8, 7 }, /* MII_TXD[0] */
72 { pinmux(3), 8, 0 }, /* MII_RXCLK */
73 { pinmux(3), 8, 1 }, /* MII_RXDV */
74 { pinmux(3), 8, 2 }, /* MII_RXER */
75 { pinmux(3), 8, 3 }, /* MII_CRS */
76 { pinmux(3), 8, 4 }, /* MII_RXD[3] */
77 { pinmux(3), 8, 5 }, /* MII_RXD[2] */
78 { pinmux(3), 8, 6 }, /* MII_RXD[1] */
79 { pinmux(3), 8, 7 }, /* MII_RXD[0] */
80};
81
82const struct pinmux_config emac_pins_mdio[] = {
83 { pinmux(4), 8, 0 }, /* MDIO_CLK */
84 { pinmux(4), 8, 1 }, /* MDIO_D */
85};
86
87/* I2C pin muxer settings */
88const struct pinmux_config i2c0_pins[] = {
89 { pinmux(4), 2, 2 }, /* I2C0_SCL */
90 { pinmux(4), 2, 3 }, /* I2C0_SDA */
91};
92
93const struct pinmux_config i2c1_pins[] = {
94 { pinmux(4), 4, 4 }, /* I2C1_SCL */
95 { pinmux(4), 4, 5 }, /* I2C1_SDA */
96};
97
98/* EMIFA pin muxer settings */
99const struct pinmux_config emifa_pins_cs2[] = {
100 { pinmux(7), 1, 0 }, /* EMA_CS2 */
101};
102
103const struct pinmux_config emifa_pins_cs3[] = {
104 { pinmux(7), 1, 1 }, /* EMA_CS[3] */
105};
106
107const struct pinmux_config emifa_pins_cs4[] = {
108 { pinmux(7), 1, 2 }, /* EMA_CS[4] */
109};
110
111const struct pinmux_config emifa_pins_nand[] = {
112 { pinmux(7), 1, 4 }, /* EMA_WE */
113 { pinmux(7), 1, 5 }, /* EMA_OE */
114 { pinmux(9), 1, 0 }, /* EMA_D[7] */
115 { pinmux(9), 1, 1 }, /* EMA_D[6] */
116 { pinmux(9), 1, 2 }, /* EMA_D[5] */
117 { pinmux(9), 1, 3 }, /* EMA_D[4] */
118 { pinmux(9), 1, 4 }, /* EMA_D[3] */
119 { pinmux(9), 1, 5 }, /* EMA_D[2] */
120 { pinmux(9), 1, 6 }, /* EMA_D[1] */
121 { pinmux(9), 1, 7 }, /* EMA_D[0] */
122 { pinmux(12), 1, 5 }, /* EMA_A[2] */
123 { pinmux(12), 1, 6 }, /* EMA_A[1] */
124};
125
126/* NOR pin muxer settings */
127const struct pinmux_config emifa_pins_nor[] = {
128 { pinmux(5), 1, 6 }, /* EMA_BA[1] */
129 { pinmux(6), 1, 6 }, /* EMA_WAIT[1] */
130 { pinmux(7), 1, 4 }, /* EMA_WE */
131 { pinmux(7), 1, 5 }, /* EMA_OE */
132 { pinmux(8), 1, 0 }, /* EMA_D[15] */
133 { pinmux(8), 1, 1 }, /* EMA_D[14] */
134 { pinmux(8), 1, 2 }, /* EMA_D[13] */
135 { pinmux(8), 1, 3 }, /* EMA_D[12] */
136 { pinmux(8), 1, 4 }, /* EMA_D[11] */
137 { pinmux(8), 1, 5 }, /* EMA_D[10] */
138 { pinmux(8), 1, 6 }, /* EMA_D[9] */
139 { pinmux(8), 1, 7 }, /* EMA_D[8] */
140 { pinmux(9), 1, 0 }, /* EMA_D[7] */
141 { pinmux(9), 1, 1 }, /* EMA_D[6] */
142 { pinmux(9), 1, 2 }, /* EMA_D[5] */
143 { pinmux(9), 1, 3 }, /* EMA_D[4] */
144 { pinmux(9), 1, 4 }, /* EMA_D[3] */
145 { pinmux(9), 1, 5 }, /* EMA_D[2] */
146 { pinmux(9), 1, 6 }, /* EMA_D[1] */
147 { pinmux(9), 1, 7 }, /* EMA_D[0] */
148 { pinmux(10), 1, 1 }, /* EMA_A[22] */
149 { pinmux(10), 1, 2 }, /* EMA_A[21] */
150 { pinmux(10), 1, 3 }, /* EMA_A[20] */
151 { pinmux(10), 1, 4 }, /* EMA_A[19] */
152 { pinmux(10), 1, 5 }, /* EMA_A[18] */
153 { pinmux(10), 1, 6 }, /* EMA_A[17] */
154 { pinmux(10), 1, 7 }, /* EMA_A[16] */
155 { pinmux(11), 1, 0 }, /* EMA_A[15] */
156 { pinmux(11), 1, 1 }, /* EMA_A[14] */
157 { pinmux(11), 1, 2 }, /* EMA_A[13] */
158 { pinmux(11), 1, 3 }, /* EMA_A[12] */
159 { pinmux(11), 1, 4 }, /* EMA_A[11] */
160 { pinmux(11), 1, 5 }, /* EMA_A[10] */
161 { pinmux(11), 1, 6 }, /* EMA_A[9] */
162 { pinmux(11), 1, 7 }, /* EMA_A[8] */
163 { pinmux(12), 1, 0 }, /* EMA_A[7] */
164 { pinmux(12), 1, 1 }, /* EMA_A[6] */
165 { pinmux(12), 1, 2 }, /* EMA_A[5] */
166 { pinmux(12), 1, 3 }, /* EMA_A[4] */
167 { pinmux(12), 1, 4 }, /* EMA_A[3] */
168 { pinmux(12), 1, 5 }, /* EMA_A[2] */
169 { pinmux(12), 1, 6 }, /* EMA_A[1] */
170 { pinmux(12), 1, 7 }, /* EMA_A[0] */
171};