Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2021 Rockchip Electronics Co., Ltd. |
| 4 | * Copyright (c) 2023 Thomas McKahan |
| 5 | * |
| 6 | */ |
| 7 | |
| 8 | /dts-v1/; |
| 9 | |
| 10 | #include <dt-bindings/gpio/gpio.h> |
| 11 | #include <dt-bindings/pinctrl/rockchip.h> |
| 12 | #include <dt-bindings/usb/pd.h> |
| 13 | #include "rk3588.dtsi" |
| 14 | |
| 15 | / { |
| 16 | model = "FriendlyElec NanoPC-T6"; |
| 17 | compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; |
| 18 | |
| 19 | aliases { |
| 20 | mmc0 = &sdhci; |
| 21 | mmc1 = &sdmmc; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 22 | }; |
| 23 | |
| 24 | chosen { |
| 25 | stdout-path = "serial2:1500000n8"; |
| 26 | }; |
| 27 | |
| 28 | leds { |
| 29 | compatible = "gpio-leds"; |
| 30 | |
| 31 | sys_led: led-0 { |
| 32 | gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; |
| 33 | label = "system-led"; |
| 34 | linux,default-trigger = "heartbeat"; |
| 35 | pinctrl-names = "default"; |
| 36 | pinctrl-0 = <&sys_led_pin>; |
| 37 | }; |
| 38 | |
| 39 | usr_led: led-1 { |
| 40 | gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; |
| 41 | label = "user-led"; |
| 42 | pinctrl-names = "default"; |
| 43 | pinctrl-0 = <&usr_led_pin>; |
| 44 | }; |
| 45 | }; |
| 46 | |
| 47 | sound { |
| 48 | compatible = "simple-audio-card"; |
| 49 | pinctrl-names = "default"; |
| 50 | pinctrl-0 = <&hp_det>; |
| 51 | |
| 52 | simple-audio-card,name = "realtek,rt5616-codec"; |
| 53 | simple-audio-card,format = "i2s"; |
| 54 | simple-audio-card,mclk-fs = <256>; |
| 55 | |
| 56 | simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; |
| 57 | simple-audio-card,hp-pin-name = "Headphones"; |
| 58 | |
| 59 | simple-audio-card,widgets = |
| 60 | "Headphone", "Headphones", |
| 61 | "Microphone", "Microphone Jack"; |
| 62 | simple-audio-card,routing = |
| 63 | "Headphones", "HPOL", |
| 64 | "Headphones", "HPOR", |
| 65 | "MIC1", "Microphone Jack", |
| 66 | "Microphone Jack", "micbias1"; |
| 67 | |
| 68 | simple-audio-card,cpu { |
| 69 | sound-dai = <&i2s0_8ch>; |
| 70 | }; |
| 71 | simple-audio-card,codec { |
| 72 | sound-dai = <&rt5616>; |
| 73 | }; |
| 74 | }; |
| 75 | |
| 76 | vcc12v_dcin: vcc12v-dcin-regulator { |
| 77 | compatible = "regulator-fixed"; |
| 78 | regulator-name = "vcc12v_dcin"; |
| 79 | regulator-always-on; |
| 80 | regulator-boot-on; |
| 81 | regulator-min-microvolt = <12000000>; |
| 82 | regulator-max-microvolt = <12000000>; |
| 83 | }; |
| 84 | |
| 85 | /* vcc5v0_sys powers peripherals */ |
| 86 | vcc5v0_sys: vcc5v0-sys-regulator { |
| 87 | compatible = "regulator-fixed"; |
| 88 | regulator-name = "vcc5v0_sys"; |
| 89 | regulator-always-on; |
| 90 | regulator-boot-on; |
| 91 | regulator-min-microvolt = <5000000>; |
| 92 | regulator-max-microvolt = <5000000>; |
| 93 | vin-supply = <&vcc12v_dcin>; |
| 94 | }; |
| 95 | |
| 96 | /* vcc4v0_sys powers the RK806, RK860's */ |
| 97 | vcc4v0_sys: vcc4v0-sys-regulator { |
| 98 | compatible = "regulator-fixed"; |
| 99 | regulator-name = "vcc4v0_sys"; |
| 100 | regulator-always-on; |
| 101 | regulator-boot-on; |
| 102 | regulator-min-microvolt = <4000000>; |
| 103 | regulator-max-microvolt = <4000000>; |
| 104 | vin-supply = <&vcc12v_dcin>; |
| 105 | }; |
| 106 | |
| 107 | vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { |
| 108 | compatible = "regulator-fixed"; |
| 109 | regulator-name = "vcc-1v1-nldo-s3"; |
| 110 | regulator-always-on; |
| 111 | regulator-boot-on; |
| 112 | regulator-min-microvolt = <1100000>; |
| 113 | regulator-max-microvolt = <1100000>; |
| 114 | vin-supply = <&vcc4v0_sys>; |
| 115 | }; |
| 116 | |
| 117 | vcc_3v3_pcie20: vcc3v3-pcie20-regulator { |
| 118 | compatible = "regulator-fixed"; |
| 119 | regulator-name = "vcc_3v3_pcie20"; |
| 120 | regulator-always-on; |
| 121 | regulator-boot-on; |
| 122 | regulator-min-microvolt = <3300000>; |
| 123 | regulator-max-microvolt = <3300000>; |
| 124 | vin-supply = <&vcc_3v3_s3>; |
| 125 | }; |
| 126 | |
| 127 | vbus5v0_typec: vbus5v0-typec-regulator { |
| 128 | compatible = "regulator-fixed"; |
| 129 | enable-active-high; |
| 130 | gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; |
| 131 | pinctrl-names = "default"; |
| 132 | pinctrl-0 = <&typec5v_pwren>; |
| 133 | regulator-name = "vbus5v0_typec"; |
| 134 | regulator-min-microvolt = <5000000>; |
| 135 | regulator-max-microvolt = <5000000>; |
| 136 | vin-supply = <&vcc5v0_sys>; |
| 137 | }; |
| 138 | |
| 139 | vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator { |
| 140 | compatible = "regulator-fixed"; |
| 141 | enable-active-high; |
| 142 | gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; |
| 143 | pinctrl-names = "default"; |
| 144 | pinctrl-0 = <&pcie_m2_1_pwren>; |
| 145 | regulator-name = "vcc3v3_pcie2x1l0"; |
| 146 | regulator-min-microvolt = <3300000>; |
| 147 | regulator-max-microvolt = <3300000>; |
| 148 | vin-supply = <&vcc5v0_sys>; |
| 149 | }; |
| 150 | |
| 151 | vcc3v3_pcie30: vcc3v3-pcie30-regulator { |
| 152 | compatible = "regulator-fixed"; |
| 153 | enable-active-high; |
| 154 | gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; |
| 155 | pinctrl-names = "default"; |
| 156 | pinctrl-0 = <&pcie_m2_0_pwren>; |
| 157 | regulator-name = "vcc3v3_pcie30"; |
| 158 | regulator-min-microvolt = <3300000>; |
| 159 | regulator-max-microvolt = <3300000>; |
| 160 | vin-supply = <&vcc5v0_sys>; |
| 161 | }; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 162 | |
| 163 | vcc3v3_sd_s0: vcc3v3-sd-s0-regulator { |
| 164 | compatible = "regulator-fixed"; |
| 165 | enable-active-low; |
| 166 | gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>; |
| 167 | regulator-boot-on; |
| 168 | regulator-max-microvolt = <3300000>; |
| 169 | regulator-min-microvolt = <3300000>; |
| 170 | regulator-name = "vcc3v3_sd_s0"; |
| 171 | vin-supply = <&vcc_3v3_s3>; |
| 172 | }; |
| 173 | |
| 174 | vdd_4g_3v3: vdd-4g-3v3-regulator { |
| 175 | compatible = "regulator-fixed"; |
| 176 | enable-active-high; |
| 177 | gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; |
| 178 | pinctrl-names = "default"; |
| 179 | pinctrl-0 = <&pin_4g_lte_pwren>; |
| 180 | regulator-name = "vdd_4g_3v3"; |
| 181 | regulator-min-microvolt = <3300000>; |
| 182 | regulator-max-microvolt = <3300000>; |
| 183 | vin-supply = <&vcc5v0_sys>; |
| 184 | }; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 185 | }; |
| 186 | |
| 187 | &combphy0_ps { |
| 188 | status = "okay"; |
| 189 | }; |
| 190 | |
| 191 | &combphy1_ps { |
| 192 | status = "okay"; |
| 193 | }; |
| 194 | |
| 195 | &combphy2_psu { |
| 196 | status = "okay"; |
| 197 | }; |
| 198 | |
| 199 | &cpu_l0 { |
| 200 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 201 | }; |
| 202 | |
| 203 | &cpu_l1 { |
| 204 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 205 | }; |
| 206 | |
| 207 | &cpu_l2 { |
| 208 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 209 | }; |
| 210 | |
| 211 | &cpu_l3 { |
| 212 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 213 | }; |
| 214 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 215 | &cpu_b0 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 216 | cpu-supply = <&vdd_cpu_big0_s0>; |
| 217 | }; |
| 218 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 219 | &cpu_b1 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 220 | cpu-supply = <&vdd_cpu_big0_s0>; |
| 221 | }; |
| 222 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 223 | &cpu_b2 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 224 | cpu-supply = <&vdd_cpu_big1_s0>; |
| 225 | }; |
| 226 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 227 | &cpu_b3 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 228 | cpu-supply = <&vdd_cpu_big1_s0>; |
| 229 | }; |
| 230 | |
| 231 | &gpio0 { |
| 232 | gpio-line-names = /* GPIO0 A0-A7 */ |
| 233 | "", "", "", "", |
| 234 | "", "", "", "", |
| 235 | /* GPIO0 B0-B7 */ |
| 236 | "", "", "", "", |
| 237 | "", "", "", "", |
| 238 | /* GPIO0 C0-C7 */ |
| 239 | "", "", "", "", |
| 240 | "HEADER_10", "HEADER_08", "HEADER_32", "", |
| 241 | /* GPIO0 D0-D7 */ |
| 242 | "", "", "", "", |
| 243 | "", "", "", ""; |
| 244 | }; |
| 245 | |
| 246 | &gpio1 { |
| 247 | gpio-line-names = /* GPIO1 A0-A7 */ |
| 248 | "HEADER_27", "HEADER_28", "", "", |
| 249 | "", "", "", "HEADER_15", |
| 250 | /* GPIO1 B0-B7 */ |
| 251 | "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23", |
| 252 | "HEADER_24", "HEADER_22", "", "", |
| 253 | /* GPIO1 C0-C7 */ |
| 254 | "", "", "", "", |
| 255 | "", "", "", "", |
| 256 | /* GPIO1 D0-D7 */ |
| 257 | "", "", "", "", |
| 258 | "", "", "HEADER_05", "HEADER_03"; |
| 259 | }; |
| 260 | |
| 261 | &gpio2 { |
| 262 | gpio-line-names = /* GPIO2 A0-A7 */ |
| 263 | "", "", "", "", |
| 264 | "", "", "", "", |
| 265 | /* GPIO2 B0-B7 */ |
| 266 | "", "", "", "", |
| 267 | "", "", "", "", |
| 268 | /* GPIO2 C0-C7 */ |
| 269 | "", "CSI1_11", "CSI1_12", "", |
| 270 | "", "", "", "", |
| 271 | /* GPIO2 D0-D7 */ |
| 272 | "", "", "", "", |
| 273 | "", "", "", ""; |
| 274 | }; |
| 275 | |
| 276 | &gpio3 { |
| 277 | gpio-line-names = /* GPIO3 A0-A7 */ |
| 278 | "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36", |
| 279 | "HEADER_37", "", "DSI0_12", "", |
| 280 | /* GPIO3 B0-B7 */ |
| 281 | "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16", |
| 282 | "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12", |
| 283 | /* GPIO3 C0-C7 */ |
| 284 | "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13", |
| 285 | "", "", "", "", |
| 286 | /* GPIO3 D0-D7 */ |
| 287 | "", "", "", "", |
| 288 | "", "DSI1_10", "", ""; |
| 289 | }; |
| 290 | |
| 291 | &gpio4 { |
| 292 | gpio-line-names = /* GPIO4 A0-A7 */ |
| 293 | "DSI1_08", "DSI1_14", "", "DSI1_12", |
| 294 | "", "", "", "", |
| 295 | /* GPIO4 B0-B7 */ |
| 296 | "", "", "", "", |
| 297 | "", "", "", "", |
| 298 | /* GPIO4 C0-C7 */ |
| 299 | "", "", "", "", |
| 300 | "CSI0_11", "CSI0_12", "", "", |
| 301 | /* GPIO4 D0-D7 */ |
| 302 | "", "", "", "", |
| 303 | "", "", "", ""; |
| 304 | }; |
| 305 | |
| 306 | &i2c0 { |
| 307 | pinctrl-names = "default"; |
| 308 | pinctrl-0 = <&i2c0m2_xfer>; |
| 309 | status = "okay"; |
| 310 | |
| 311 | vdd_cpu_big0_s0: regulator@42 { |
| 312 | compatible = "rockchip,rk8602"; |
| 313 | reg = <0x42>; |
| 314 | fcs,suspend-voltage-selector = <1>; |
| 315 | regulator-name = "vdd_cpu_big0_s0"; |
| 316 | regulator-always-on; |
| 317 | regulator-boot-on; |
| 318 | regulator-min-microvolt = <550000>; |
| 319 | regulator-max-microvolt = <1050000>; |
| 320 | regulator-ramp-delay = <2300>; |
| 321 | vin-supply = <&vcc4v0_sys>; |
| 322 | |
| 323 | regulator-state-mem { |
| 324 | regulator-off-in-suspend; |
| 325 | }; |
| 326 | }; |
| 327 | |
| 328 | vdd_cpu_big1_s0: regulator@43 { |
| 329 | compatible = "rockchip,rk8603", "rockchip,rk8602"; |
| 330 | reg = <0x43>; |
| 331 | fcs,suspend-voltage-selector = <1>; |
| 332 | regulator-name = "vdd_cpu_big1_s0"; |
| 333 | regulator-always-on; |
| 334 | regulator-boot-on; |
| 335 | regulator-min-microvolt = <550000>; |
| 336 | regulator-max-microvolt = <1050000>; |
| 337 | regulator-ramp-delay = <2300>; |
| 338 | vin-supply = <&vcc4v0_sys>; |
| 339 | |
| 340 | regulator-state-mem { |
| 341 | regulator-off-in-suspend; |
| 342 | }; |
| 343 | }; |
| 344 | }; |
| 345 | |
| 346 | &i2c2 { |
| 347 | status = "okay"; |
| 348 | |
| 349 | vdd_npu_s0: regulator@42 { |
| 350 | compatible = "rockchip,rk8602"; |
| 351 | reg = <0x42>; |
| 352 | rockchip,suspend-voltage-selector = <1>; |
| 353 | regulator-name = "vdd_npu_s0"; |
| 354 | regulator-always-on; |
| 355 | regulator-boot-on; |
| 356 | regulator-min-microvolt = <550000>; |
| 357 | regulator-max-microvolt = <950000>; |
| 358 | regulator-ramp-delay = <2300>; |
| 359 | vin-supply = <&vcc4v0_sys>; |
| 360 | |
| 361 | regulator-state-mem { |
| 362 | regulator-off-in-suspend; |
| 363 | }; |
| 364 | }; |
| 365 | }; |
| 366 | |
| 367 | &i2c6 { |
| 368 | clock-frequency = <200000>; |
| 369 | status = "okay"; |
| 370 | |
| 371 | fusb302: typec-portc@22 { |
| 372 | compatible = "fcs,fusb302"; |
| 373 | reg = <0x22>; |
| 374 | interrupt-parent = <&gpio0>; |
| 375 | interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>; |
| 376 | pinctrl-0 = <&usbc0_int>; |
| 377 | pinctrl-names = "default"; |
| 378 | vbus-supply = <&vbus5v0_typec>; |
| 379 | |
| 380 | connector { |
| 381 | compatible = "usb-c-connector"; |
| 382 | data-role = "dual"; |
| 383 | label = "USB-C"; |
| 384 | power-role = "dual"; |
| 385 | try-power-role = "sink"; |
| 386 | source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>; |
| 387 | sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; |
| 388 | op-sink-microwatt = <1000000>; |
| 389 | }; |
| 390 | }; |
| 391 | |
| 392 | hym8563: rtc@51 { |
| 393 | compatible = "haoyu,hym8563"; |
| 394 | reg = <0x51>; |
| 395 | #clock-cells = <0>; |
| 396 | clock-output-names = "hym8563"; |
| 397 | pinctrl-names = "default"; |
| 398 | pinctrl-0 = <&hym8563_int>; |
| 399 | interrupt-parent = <&gpio0>; |
| 400 | interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; |
| 401 | wakeup-source; |
| 402 | }; |
| 403 | }; |
| 404 | |
| 405 | &i2c7 { |
| 406 | clock-frequency = <200000>; |
| 407 | status = "okay"; |
| 408 | |
| 409 | rt5616: codec@1b { |
| 410 | compatible = "realtek,rt5616"; |
| 411 | reg = <0x1b>; |
| 412 | clocks = <&cru I2S0_8CH_MCLKOUT>; |
| 413 | clock-names = "mclk"; |
| 414 | #sound-dai-cells = <0>; |
| 415 | assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; |
| 416 | assigned-clock-rates = <12288000>; |
| 417 | |
| 418 | port { |
| 419 | rt5616_p0_0: endpoint { |
| 420 | remote-endpoint = <&i2s0_8ch_p0_0>; |
| 421 | }; |
| 422 | }; |
| 423 | }; |
| 424 | |
| 425 | /* connected with MIPI-CSI1 */ |
| 426 | }; |
| 427 | |
| 428 | &i2c8 { |
| 429 | pinctrl-0 = <&i2c8m2_xfer>; |
| 430 | }; |
| 431 | |
| 432 | &i2s0_8ch { |
| 433 | pinctrl-names = "default"; |
| 434 | pinctrl-0 = <&i2s0_lrck |
| 435 | &i2s0_mclk |
| 436 | &i2s0_sclk |
| 437 | &i2s0_sdi0 |
| 438 | &i2s0_sdo0>; |
| 439 | status = "okay"; |
| 440 | |
| 441 | i2s0_8ch_p0: port { |
| 442 | i2s0_8ch_p0_0: endpoint { |
| 443 | dai-format = "i2s"; |
| 444 | mclk-fs = <256>; |
| 445 | remote-endpoint = <&rt5616_p0_0>; |
| 446 | }; |
| 447 | }; |
| 448 | }; |
| 449 | |
| 450 | &pcie2x1l0 { |
| 451 | reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; |
| 452 | vpcie3v3-supply = <&vcc_3v3_pcie20>; |
| 453 | pinctrl-names = "default"; |
| 454 | pinctrl-0 = <&pcie2_0_rst>; |
| 455 | status = "okay"; |
| 456 | }; |
| 457 | |
| 458 | &pcie2x1l1 { |
| 459 | reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; |
| 460 | vpcie3v3-supply = <&vcc3v3_pcie2x1l0>; |
| 461 | pinctrl-names = "default"; |
| 462 | pinctrl-0 = <&pcie2_1_rst>; |
| 463 | status = "okay"; |
| 464 | }; |
| 465 | |
| 466 | &pcie2x1l2 { |
| 467 | reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; |
| 468 | vpcie3v3-supply = <&vcc_3v3_pcie20>; |
| 469 | pinctrl-names = "default"; |
| 470 | pinctrl-0 = <&pcie2_2_rst>; |
| 471 | status = "okay"; |
| 472 | }; |
| 473 | |
| 474 | &pcie30phy { |
| 475 | status = "okay"; |
| 476 | }; |
| 477 | |
| 478 | &pcie3x4 { |
| 479 | reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; |
| 480 | vpcie3v3-supply = <&vcc3v3_pcie30>; |
| 481 | status = "okay"; |
| 482 | }; |
| 483 | |
| 484 | &pinctrl { |
| 485 | gpio-leds { |
| 486 | sys_led_pin: sys-led-pin { |
| 487 | rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; |
| 488 | }; |
| 489 | |
| 490 | usr_led_pin: usr-led-pin { |
| 491 | rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; |
| 492 | }; |
| 493 | }; |
| 494 | |
| 495 | headphone { |
| 496 | hp_det: hp-det { |
| 497 | rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; |
| 498 | }; |
| 499 | }; |
| 500 | |
| 501 | hym8563 { |
| 502 | hym8563_int: hym8563-int { |
| 503 | rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; |
| 504 | }; |
| 505 | }; |
| 506 | |
| 507 | pcie { |
| 508 | pcie2_0_rst: pcie2-0-rst { |
| 509 | rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; |
| 510 | }; |
| 511 | |
| 512 | pcie2_1_rst: pcie2-1-rst { |
| 513 | rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; |
| 514 | }; |
| 515 | |
| 516 | pcie2_2_rst: pcie2-2-rst { |
| 517 | rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; |
| 518 | }; |
| 519 | |
| 520 | pcie_m2_0_pwren: pcie-m20-pwren { |
| 521 | rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; |
| 522 | }; |
| 523 | |
| 524 | pcie_m2_1_pwren: pcie-m21-pwren { |
| 525 | rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; |
| 526 | }; |
| 527 | }; |
| 528 | |
| 529 | usb { |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 530 | pin_4g_lte_pwren: 4g-lte-pwren { |
| 531 | rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; |
| 532 | }; |
| 533 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 534 | typec5v_pwren: typec5v-pwren { |
| 535 | rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; |
| 536 | }; |
| 537 | |
| 538 | usbc0_int: usbc0-int { |
| 539 | rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; |
| 540 | }; |
| 541 | }; |
| 542 | }; |
| 543 | |
| 544 | &pwm1 { |
| 545 | pinctrl-0 = <&pwm1m1_pins>; |
| 546 | status = "okay"; |
| 547 | }; |
| 548 | |
| 549 | &saradc { |
| 550 | vref-supply = <&avcc_1v8_s0>; |
| 551 | status = "okay"; |
| 552 | }; |
| 553 | |
| 554 | &sdhci { |
| 555 | bus-width = <8>; |
| 556 | no-sdio; |
| 557 | no-sd; |
| 558 | non-removable; |
| 559 | max-frequency = <200000000>; |
| 560 | mmc-hs400-1_8v; |
| 561 | mmc-hs400-enhanced-strobe; |
| 562 | status = "okay"; |
| 563 | }; |
| 564 | |
| 565 | &sdmmc { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 566 | bus-width = <4>; |
| 567 | cap-mmc-highspeed; |
| 568 | cap-sd-highspeed; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 569 | cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 570 | disable-wp; |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 571 | no-mmc; |
| 572 | no-sdio; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 573 | sd-uhs-sdr104; |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 574 | vmmc-supply = <&vcc3v3_sd_s0>; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 575 | vqmmc-supply = <&vccio_sd_s0>; |
| 576 | status = "okay"; |
| 577 | }; |
| 578 | |
| 579 | &spi2 { |
| 580 | status = "okay"; |
| 581 | assigned-clocks = <&cru CLK_SPI2>; |
| 582 | assigned-clock-rates = <200000000>; |
| 583 | pinctrl-names = "default"; |
| 584 | pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; |
| 585 | num-cs = <1>; |
| 586 | |
| 587 | pmic@0 { |
| 588 | compatible = "rockchip,rk806"; |
| 589 | spi-max-frequency = <1000000>; |
| 590 | reg = <0x0>; |
| 591 | |
| 592 | interrupt-parent = <&gpio0>; |
| 593 | interrupts = <7 IRQ_TYPE_LEVEL_LOW>; |
| 594 | |
| 595 | pinctrl-names = "default"; |
| 596 | pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, |
| 597 | <&rk806_dvs2_null>, <&rk806_dvs3_null>; |
| 598 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 599 | system-power-controller; |
| 600 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 601 | vcc1-supply = <&vcc4v0_sys>; |
| 602 | vcc2-supply = <&vcc4v0_sys>; |
| 603 | vcc3-supply = <&vcc4v0_sys>; |
| 604 | vcc4-supply = <&vcc4v0_sys>; |
| 605 | vcc5-supply = <&vcc4v0_sys>; |
| 606 | vcc6-supply = <&vcc4v0_sys>; |
| 607 | vcc7-supply = <&vcc4v0_sys>; |
| 608 | vcc8-supply = <&vcc4v0_sys>; |
| 609 | vcc9-supply = <&vcc4v0_sys>; |
| 610 | vcc10-supply = <&vcc4v0_sys>; |
| 611 | vcc11-supply = <&vcc_2v0_pldo_s3>; |
| 612 | vcc12-supply = <&vcc4v0_sys>; |
| 613 | vcc13-supply = <&vcc_1v1_nldo_s3>; |
| 614 | vcc14-supply = <&vcc_1v1_nldo_s3>; |
| 615 | vcca-supply = <&vcc4v0_sys>; |
| 616 | |
| 617 | gpio-controller; |
| 618 | #gpio-cells = <2>; |
| 619 | |
| 620 | rk806_dvs1_null: dvs1-null-pins { |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 621 | pins = "gpio_pwrctrl1"; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 622 | function = "pin_fun0"; |
| 623 | }; |
| 624 | |
| 625 | rk806_dvs2_null: dvs2-null-pins { |
| 626 | pins = "gpio_pwrctrl2"; |
| 627 | function = "pin_fun0"; |
| 628 | }; |
| 629 | |
| 630 | rk806_dvs3_null: dvs3-null-pins { |
| 631 | pins = "gpio_pwrctrl3"; |
| 632 | function = "pin_fun0"; |
| 633 | }; |
| 634 | |
| 635 | regulators { |
| 636 | vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { |
| 637 | regulator-boot-on; |
| 638 | regulator-min-microvolt = <550000>; |
| 639 | regulator-max-microvolt = <950000>; |
| 640 | regulator-ramp-delay = <12500>; |
| 641 | regulator-name = "vdd_gpu_s0"; |
| 642 | regulator-enable-ramp-delay = <400>; |
| 643 | |
| 644 | regulator-state-mem { |
| 645 | regulator-off-in-suspend; |
| 646 | }; |
| 647 | }; |
| 648 | |
| 649 | vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { |
| 650 | regulator-always-on; |
| 651 | regulator-boot-on; |
| 652 | regulator-min-microvolt = <550000>; |
| 653 | regulator-max-microvolt = <950000>; |
| 654 | regulator-ramp-delay = <12500>; |
| 655 | regulator-name = "vdd_cpu_lit_s0"; |
| 656 | |
| 657 | regulator-state-mem { |
| 658 | regulator-off-in-suspend; |
| 659 | }; |
| 660 | }; |
| 661 | |
| 662 | vdd_log_s0: dcdc-reg3 { |
| 663 | regulator-always-on; |
| 664 | regulator-boot-on; |
| 665 | regulator-min-microvolt = <675000>; |
| 666 | regulator-max-microvolt = <750000>; |
| 667 | regulator-ramp-delay = <12500>; |
| 668 | regulator-name = "vdd_log_s0"; |
| 669 | |
| 670 | regulator-state-mem { |
| 671 | regulator-off-in-suspend; |
| 672 | regulator-suspend-microvolt = <750000>; |
| 673 | }; |
| 674 | }; |
| 675 | |
| 676 | vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { |
| 677 | regulator-always-on; |
| 678 | regulator-boot-on; |
| 679 | regulator-min-microvolt = <550000>; |
| 680 | regulator-max-microvolt = <950000>; |
| 681 | regulator-init-microvolt = <750000>; |
| 682 | regulator-ramp-delay = <12500>; |
| 683 | regulator-name = "vdd_vdenc_s0"; |
| 684 | |
| 685 | regulator-state-mem { |
| 686 | regulator-off-in-suspend; |
| 687 | }; |
| 688 | }; |
| 689 | |
| 690 | vdd_ddr_s0: dcdc-reg5 { |
| 691 | regulator-always-on; |
| 692 | regulator-boot-on; |
| 693 | regulator-min-microvolt = <675000>; |
| 694 | regulator-max-microvolt = <900000>; |
| 695 | regulator-ramp-delay = <12500>; |
| 696 | regulator-name = "vdd_ddr_s0"; |
| 697 | |
| 698 | regulator-state-mem { |
| 699 | regulator-off-in-suspend; |
| 700 | regulator-suspend-microvolt = <850000>; |
| 701 | }; |
| 702 | }; |
| 703 | |
| 704 | vdd2_ddr_s3: dcdc-reg6 { |
| 705 | regulator-always-on; |
| 706 | regulator-boot-on; |
| 707 | regulator-name = "vdd2_ddr_s3"; |
| 708 | |
| 709 | regulator-state-mem { |
| 710 | regulator-on-in-suspend; |
| 711 | }; |
| 712 | }; |
| 713 | |
| 714 | vcc_2v0_pldo_s3: dcdc-reg7 { |
| 715 | regulator-always-on; |
| 716 | regulator-boot-on; |
| 717 | regulator-min-microvolt = <2000000>; |
| 718 | regulator-max-microvolt = <2000000>; |
| 719 | regulator-ramp-delay = <12500>; |
| 720 | regulator-name = "vdd_2v0_pldo_s3"; |
| 721 | |
| 722 | regulator-state-mem { |
| 723 | regulator-on-in-suspend; |
| 724 | regulator-suspend-microvolt = <2000000>; |
| 725 | }; |
| 726 | }; |
| 727 | |
| 728 | vcc_3v3_s3: dcdc-reg8 { |
| 729 | regulator-always-on; |
| 730 | regulator-boot-on; |
| 731 | regulator-min-microvolt = <3300000>; |
| 732 | regulator-max-microvolt = <3300000>; |
| 733 | regulator-name = "vcc_3v3_s3"; |
| 734 | |
| 735 | regulator-state-mem { |
| 736 | regulator-on-in-suspend; |
| 737 | regulator-suspend-microvolt = <3300000>; |
| 738 | }; |
| 739 | }; |
| 740 | |
| 741 | vddq_ddr_s0: dcdc-reg9 { |
| 742 | regulator-always-on; |
| 743 | regulator-boot-on; |
| 744 | regulator-name = "vddq_ddr_s0"; |
| 745 | |
| 746 | regulator-state-mem { |
| 747 | regulator-off-in-suspend; |
| 748 | }; |
| 749 | }; |
| 750 | |
| 751 | vcc_1v8_s3: dcdc-reg10 { |
| 752 | regulator-always-on; |
| 753 | regulator-boot-on; |
| 754 | regulator-min-microvolt = <1800000>; |
| 755 | regulator-max-microvolt = <1800000>; |
| 756 | regulator-name = "vcc_1v8_s3"; |
| 757 | |
| 758 | regulator-state-mem { |
| 759 | regulator-on-in-suspend; |
| 760 | regulator-suspend-microvolt = <1800000>; |
| 761 | }; |
| 762 | }; |
| 763 | |
| 764 | avcc_1v8_s0: pldo-reg1 { |
| 765 | regulator-always-on; |
| 766 | regulator-boot-on; |
| 767 | regulator-min-microvolt = <1800000>; |
| 768 | regulator-max-microvolt = <1800000>; |
| 769 | regulator-name = "avcc_1v8_s0"; |
| 770 | |
| 771 | regulator-state-mem { |
| 772 | regulator-off-in-suspend; |
| 773 | }; |
| 774 | }; |
| 775 | |
| 776 | vcc_1v8_s0: pldo-reg2 { |
| 777 | regulator-always-on; |
| 778 | regulator-boot-on; |
| 779 | regulator-min-microvolt = <1800000>; |
| 780 | regulator-max-microvolt = <1800000>; |
| 781 | regulator-name = "vcc_1v8_s0"; |
| 782 | |
| 783 | regulator-state-mem { |
| 784 | regulator-off-in-suspend; |
| 785 | regulator-suspend-microvolt = <1800000>; |
| 786 | }; |
| 787 | }; |
| 788 | |
| 789 | avdd_1v2_s0: pldo-reg3 { |
| 790 | regulator-always-on; |
| 791 | regulator-boot-on; |
| 792 | regulator-min-microvolt = <1200000>; |
| 793 | regulator-max-microvolt = <1200000>; |
| 794 | regulator-name = "avdd_1v2_s0"; |
| 795 | |
| 796 | regulator-state-mem { |
| 797 | regulator-off-in-suspend; |
| 798 | }; |
| 799 | }; |
| 800 | |
| 801 | vcc_3v3_s0: pldo-reg4 { |
| 802 | regulator-always-on; |
| 803 | regulator-boot-on; |
| 804 | regulator-min-microvolt = <3300000>; |
| 805 | regulator-max-microvolt = <3300000>; |
| 806 | regulator-ramp-delay = <12500>; |
| 807 | regulator-name = "vcc_3v3_s0"; |
| 808 | |
| 809 | regulator-state-mem { |
| 810 | regulator-off-in-suspend; |
| 811 | }; |
| 812 | }; |
| 813 | |
| 814 | vccio_sd_s0: pldo-reg5 { |
| 815 | regulator-always-on; |
| 816 | regulator-boot-on; |
| 817 | regulator-min-microvolt = <1800000>; |
| 818 | regulator-max-microvolt = <3300000>; |
| 819 | regulator-ramp-delay = <12500>; |
| 820 | regulator-name = "vccio_sd_s0"; |
| 821 | |
| 822 | regulator-state-mem { |
| 823 | regulator-off-in-suspend; |
| 824 | }; |
| 825 | }; |
| 826 | |
| 827 | pldo6_s3: pldo-reg6 { |
| 828 | regulator-always-on; |
| 829 | regulator-boot-on; |
| 830 | regulator-min-microvolt = <1800000>; |
| 831 | regulator-max-microvolt = <1800000>; |
| 832 | regulator-name = "pldo6_s3"; |
| 833 | |
| 834 | regulator-state-mem { |
| 835 | regulator-on-in-suspend; |
| 836 | regulator-suspend-microvolt = <1800000>; |
| 837 | }; |
| 838 | }; |
| 839 | |
| 840 | vdd_0v75_s3: nldo-reg1 { |
| 841 | regulator-always-on; |
| 842 | regulator-boot-on; |
| 843 | regulator-min-microvolt = <750000>; |
| 844 | regulator-max-microvolt = <750000>; |
| 845 | regulator-name = "vdd_0v75_s3"; |
| 846 | |
| 847 | regulator-state-mem { |
| 848 | regulator-on-in-suspend; |
| 849 | regulator-suspend-microvolt = <750000>; |
| 850 | }; |
| 851 | }; |
| 852 | |
| 853 | vdd_ddr_pll_s0: nldo-reg2 { |
| 854 | regulator-always-on; |
| 855 | regulator-boot-on; |
| 856 | regulator-min-microvolt = <850000>; |
| 857 | regulator-max-microvolt = <850000>; |
| 858 | regulator-name = "vdd_ddr_pll_s0"; |
| 859 | |
| 860 | regulator-state-mem { |
| 861 | regulator-off-in-suspend; |
| 862 | regulator-suspend-microvolt = <850000>; |
| 863 | }; |
| 864 | }; |
| 865 | |
| 866 | avdd_0v75_s0: nldo-reg3 { |
| 867 | regulator-always-on; |
| 868 | regulator-boot-on; |
| 869 | regulator-min-microvolt = <750000>; |
| 870 | regulator-max-microvolt = <750000>; |
| 871 | regulator-name = "avdd_0v75_s0"; |
| 872 | |
| 873 | regulator-state-mem { |
| 874 | regulator-off-in-suspend; |
| 875 | }; |
| 876 | }; |
| 877 | |
| 878 | vdd_0v85_s0: nldo-reg4 { |
| 879 | regulator-always-on; |
| 880 | regulator-boot-on; |
| 881 | regulator-min-microvolt = <850000>; |
| 882 | regulator-max-microvolt = <850000>; |
| 883 | regulator-name = "vdd_0v85_s0"; |
| 884 | |
| 885 | regulator-state-mem { |
| 886 | regulator-off-in-suspend; |
| 887 | }; |
| 888 | }; |
| 889 | |
| 890 | vdd_0v75_s0: nldo-reg5 { |
| 891 | regulator-always-on; |
| 892 | regulator-boot-on; |
| 893 | regulator-min-microvolt = <750000>; |
| 894 | regulator-max-microvolt = <750000>; |
| 895 | regulator-name = "vdd_0v75_s0"; |
| 896 | |
| 897 | regulator-state-mem { |
| 898 | regulator-off-in-suspend; |
| 899 | }; |
| 900 | }; |
| 901 | }; |
| 902 | }; |
| 903 | }; |
| 904 | |
| 905 | &tsadc { |
| 906 | status = "okay"; |
| 907 | }; |
| 908 | |
| 909 | &uart2 { |
| 910 | pinctrl-0 = <&uart2m0_xfer>; |
| 911 | status = "okay"; |
| 912 | }; |
| 913 | |
| 914 | &u2phy2_host { |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 915 | phy-supply = <&vdd_4g_3v3>; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 916 | status = "okay"; |
| 917 | }; |
| 918 | |
| 919 | &u2phy3_host { |
| 920 | status = "okay"; |
| 921 | }; |
| 922 | |
| 923 | &u2phy2 { |
| 924 | status = "okay"; |
| 925 | }; |
| 926 | |
| 927 | &u2phy3 { |
| 928 | status = "okay"; |
| 929 | }; |
| 930 | |
| 931 | &usb_host0_ehci { |
| 932 | status = "okay"; |
| 933 | }; |
| 934 | |
| 935 | &usb_host0_ohci { |
| 936 | status = "okay"; |
| 937 | }; |
| 938 | |
| 939 | &usb_host1_ehci { |
| 940 | status = "okay"; |
| 941 | }; |
| 942 | |
| 943 | &usb_host1_ohci { |
| 944 | status = "okay"; |
| 945 | }; |