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git01.mediatek.com / filogic / uboot / c892dd70dfbe802c70a84cbe8d4240cf69d164bc / . / dts / upstream / src / arm64 / rockchip / rk3399-pinephone-pro.dts
blob: e5709c7ee06aae00de16032d5d2fb01ffd7ffc47 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Martijn Braam <martijn@brixit.nl>
4 * Copyright (c) 2021 Kamil Trzciński <ayufan@ayufan.eu>
5 */
6
7/*
8 * PinePhone Pro datasheet:
9 * https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf
10 */
11
12/dts-v1/;
13#include <dt-bindings/input/gpio-keys.h>
14#include <dt-bindings/input/linux-event-codes.h>
15#include "rk3399.dtsi"
16#include "rk3399-opp.dtsi"
17
18/ {
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]19 model = "Pine64 PinePhone Pro";
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]20 compatible = "pine64,pinephone-pro", "rockchip,rk3399";
21 chassis-type = "handset";
22
23 aliases {
24 mmc0 = &sdio0;
25 mmc1 = &sdmmc;
26 mmc2 = &sdhci;
27 };
28
29 chosen {
30 stdout-path = "serial2:115200n8";
31 };
32
33 adc-keys {
34 compatible = "adc-keys";
35 io-channels = <&saradc 1>;
36 io-channel-names = "buttons";
37 keyup-threshold-microvolt = <1600000>;
38 poll-interval = <100>;
39
40 button-up {
41 label = "Volume Up";
42 linux,code = <KEY_VOLUMEUP>;
43 press-threshold-microvolt = <100000>;
44 };
45
46 button-down {
47 label = "Volume Down";
48 linux,code = <KEY_VOLUMEDOWN>;
49 press-threshold-microvolt = <600000>;
50 };
51 };
52
53 backlight: backlight {
54 compatible = "pwm-backlight";
55 pwms = <&pwm0 0 50000 0>;
56 };
57
58 gpio-keys {
59 compatible = "gpio-keys";
60 pinctrl-names = "default";
61 pinctrl-0 = <&pwrbtn_pin>;
62
63 key-power {
64 debounce-interval = <20>;
65 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
66 label = "Power";
67 linux,code = <KEY_POWER>;
68 wakeup-source;
69 };
70 };
71
72 vcc_sys: vcc-sys-regulator {
73 compatible = "regulator-fixed";
74 regulator-name = "vcc_sys";
75 regulator-always-on;
76 regulator-boot-on;
77 };
78
79 vcc3v3_sys: vcc3v3-sys-regulator {
80 compatible = "regulator-fixed";
81 regulator-name = "vcc3v3_sys";
82 regulator-always-on;
83 regulator-boot-on;
84 regulator-min-microvolt = <3300000>;
85 regulator-max-microvolt = <3300000>;
86 vin-supply = <&vcc_sys>;
87 };
88
89 vcca1v8_s3: vcc1v8-s3-regulator {
90 compatible = "regulator-fixed";
91 regulator-name = "vcca1v8_s3";
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 vin-supply = <&vcc3v3_sys>;
95 regulator-always-on;
96 regulator-boot-on;
97 };
98
99 vcc1v8_codec: vcc1v8-codec-regulator {
100 compatible = "regulator-fixed";
101 enable-active-high;
102 gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
103 pinctrl-names = "default";
104 pinctrl-0 = <&vcc1v8_codec_en>;
105 regulator-name = "vcc1v8_codec";
106 regulator-min-microvolt = <1800000>;
107 regulator-max-microvolt = <1800000>;
108 vin-supply = <&vcc3v3_sys>;
109 };
110
111 wifi_pwrseq: sdio-wifi-pwrseq {
112 compatible = "mmc-pwrseq-simple";
113 clocks = <&rk818 1>;
114 clock-names = "ext_clock";
115 pinctrl-names = "default";
116 pinctrl-0 = <&wifi_enable_h_pin>;
117 /*
118 * Wait between power-on and SDIO access for CYP43455
119 * POR circuit.
120 */
121 post-power-on-delay-ms = <110>;
122 /*
123 * Wait between consecutive toggles for CYP43455 CBUCK
124 * regulator discharge.
125 */
126 power-off-delay-us = <10000>;
127
128 /* WL_REG_ON on module */
129 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
130 };
131
132 /* MIPI DSI panel 1.8v supply */
133 vcc1v8_lcd: vcc1v8-lcd {
134 compatible = "regulator-fixed";
135 enable-active-high;
136 regulator-name = "vcc1v8_lcd";
137 regulator-min-microvolt = <1800000>;
138 regulator-max-microvolt = <1800000>;
139 vin-supply = <&vcc3v3_sys>;
140 gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
141 pinctrl-names = "default";
142 };
143
144 /* MIPI DSI panel 2.8v supply */
145 vcc2v8_lcd: vcc2v8-lcd {
146 compatible = "regulator-fixed";
147 enable-active-high;
148 regulator-name = "vcc2v8_lcd";
149 regulator-min-microvolt = <2800000>;
150 regulator-max-microvolt = <2800000>;
151 vin-supply = <&vcc3v3_sys>;
152 gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
153 pinctrl-names = "default";
154 };
155};
156
157&cpu_alert0 {
158 temperature = <65000>;
159};
160&cpu_alert1 {
161 temperature = <68000>;
162};
163
164&cpu_l0 {
165 cpu-supply = <&vdd_cpu_l>;
166};
167
168&cpu_l1 {
169 cpu-supply = <&vdd_cpu_l>;
170};
171
172&cpu_l2 {
173 cpu-supply = <&vdd_cpu_l>;
174};
175
176&cpu_l3 {
177 cpu-supply = <&vdd_cpu_l>;
178};
179
180&cpu_b0 {
181 cpu-supply = <&vdd_cpu_b>;
182};
183
184&cpu_b1 {
185 cpu-supply = <&vdd_cpu_b>;
186};
187
188&emmc_phy {
189 status = "okay";
190};
191
192&gpu {
193 mali-supply = <&vdd_gpu>;
194 status = "okay";
195};
196
197&i2c0 {
198 clock-frequency = <400000>;
199 i2c-scl-rising-time-ns = <168>;
200 i2c-scl-falling-time-ns = <4>;
201 status = "okay";
202
203 rk818: pmic@1c {
204 compatible = "rockchip,rk818";
205 reg = <0x1c>;
206 interrupt-parent = <&gpio1>;
207 interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
208 #clock-cells = <1>;
209 clock-output-names = "xin32k", "rk808-clkout2";
210 pinctrl-names = "default";
211 pinctrl-0 = <&pmic_int_l>;
212 rockchip,system-power-controller;
213 wakeup-source;
214
215 vcc1-supply = <&vcc_sys>;
216 vcc2-supply = <&vcc_sys>;
217 vcc3-supply = <&vcc_sys>;
218 vcc4-supply = <&vcc_sys>;
219 vcc6-supply = <&vcc_sys>;
220 vcc7-supply = <&vcc3v3_sys>;
221 vcc8-supply = <&vcc_sys>;
222 vcc9-supply = <&vcc3v3_sys>;
223
224 regulators {
225 vdd_cpu_l: DCDC_REG1 {
226 regulator-name = "vdd_cpu_l";
227 regulator-always-on;
228 regulator-boot-on;
229 regulator-min-microvolt = <875000>;
230 regulator-max-microvolt = <975000>;
231 regulator-ramp-delay = <6001>;
232 regulator-state-mem {
233 regulator-off-in-suspend;
234 };
235 };
236
237 vdd_center: DCDC_REG2 {
238 regulator-name = "vdd_center";
239 regulator-always-on;
240 regulator-boot-on;
241 regulator-min-microvolt = <800000>;
242 regulator-max-microvolt = <1000000>;
243 regulator-ramp-delay = <6001>;
244 regulator-state-mem {
245 regulator-off-in-suspend;
246 };
247 };
248
249 vcc_ddr: DCDC_REG3 {
250 regulator-name = "vcc_ddr";
251 regulator-always-on;
252 regulator-boot-on;
253 regulator-state-mem {
254 regulator-on-in-suspend;
255 };
256 };
257
258 vcc_1v8: DCDC_REG4 {
259 regulator-name = "vcc_1v8";
260 regulator-always-on;
261 regulator-boot-on;
262 regulator-min-microvolt = <1800000>;
263 regulator-max-microvolt = <1800000>;
264 regulator-state-mem {
265 regulator-on-in-suspend;
266 };
267 };
268
269 vcca3v0_codec: LDO_REG1 {
270 regulator-name = "vcca3v0_codec";
271 regulator-min-microvolt = <3000000>;
272 regulator-max-microvolt = <3000000>;
273 };
274
275 vcc3v0_touch: LDO_REG2 {
276 regulator-name = "vcc3v0_touch";
277 regulator-min-microvolt = <3000000>;
278 regulator-max-microvolt = <3000000>;
279 };
280
281 vcca1v8_codec: LDO_REG3 {
282 regulator-name = "vcca1v8_codec";
283 regulator-min-microvolt = <1800000>;
284 regulator-max-microvolt = <1800000>;
285 };
286
287 rk818_pwr_on: LDO_REG4 {
288 regulator-name = "rk818_pwr_on";
289 regulator-always-on;
290 regulator-boot-on;
291 regulator-min-microvolt = <3300000>;
292 regulator-max-microvolt = <3300000>;
293 regulator-state-mem {
294 regulator-on-in-suspend;
295 };
296 };
297
298 vcc_3v0: LDO_REG5 {
299 regulator-name = "vcc_3v0";
300 regulator-always-on;
301 regulator-boot-on;
302 regulator-min-microvolt = <3000000>;
303 regulator-max-microvolt = <3000000>;
304 regulator-state-mem {
305 regulator-on-in-suspend;
306 };
307 };
308
309 vcc_1v5: LDO_REG6 {
310 regulator-name = "vcc_1v5";
311 regulator-always-on;
312 regulator-boot-on;
313 regulator-min-microvolt = <1500000>;
314 regulator-max-microvolt = <1500000>;
315 regulator-state-mem {
316 regulator-on-in-suspend;
317 };
318 };
319
320 vcc1v8_dvp: LDO_REG7 {
321 regulator-name = "vcc1v8_dvp";
322 regulator-min-microvolt = <1800000>;
323 regulator-max-microvolt = <1800000>;
324 };
325
326 vcc3v3_s3: LDO_REG8 {
327 regulator-name = "vcc3v3_s3";
328 regulator-always-on;
329 regulator-boot-on;
330 regulator-min-microvolt = <3300000>;
331 regulator-max-microvolt = <3300000>;
332 regulator-state-mem {
333 regulator-off-in-suspend;
334 };
335 };
336
337 vccio_sd: LDO_REG9 {
338 regulator-name = "vccio_sd";
339 regulator-min-microvolt = <1800000>;
340 regulator-max-microvolt = <3300000>;
341 };
342
343 vcc3v3_s0: SWITCH_REG {
344 regulator-name = "vcc3v3_s0";
345 regulator-always-on;
346 regulator-boot-on;
347 regulator-state-mem {
348 regulator-on-in-suspend;
349 };
350 };
351 };
352 };
353
354 vdd_cpu_b: regulator@40 {
355 compatible = "silergy,syr827";
356 reg = <0x40>;
357 fcs,suspend-voltage-selector = <1>;
358 pinctrl-names = "default";
359 pinctrl-0 = <&vsel1_pin>;
360 regulator-name = "vdd_cpu_b";
361 regulator-min-microvolt = <875000>;
362 regulator-max-microvolt = <1150000>;
363 regulator-ramp-delay = <1000>;
364 regulator-always-on;
365 regulator-boot-on;
366
367 regulator-state-mem {
368 regulator-off-in-suspend;
369 };
370 };
371
372 vdd_gpu: regulator@41 {
373 compatible = "silergy,syr828";
374 reg = <0x41>;
375 fcs,suspend-voltage-selector = <1>;
376 pinctrl-names = "default";
377 pinctrl-0 = <&vsel2_pin>;
378 regulator-name = "vdd_gpu";
379 regulator-min-microvolt = <875000>;
380 regulator-max-microvolt = <975000>;
381 regulator-ramp-delay = <1000>;
382 regulator-always-on;
383 regulator-boot-on;
384
385 regulator-state-mem {
386 regulator-off-in-suspend;
387 };
388 };
389};
390
391&i2c3 {
392 i2c-scl-rising-time-ns = <450>;
393 i2c-scl-falling-time-ns = <15>;
394 status = "okay";
395
396 touchscreen@14 {
397 compatible = "goodix,gt1158";
398 reg = <0x14>;
399 interrupt-parent = <&gpio3>;
400 interrupts = <RK_PB5 IRQ_TYPE_EDGE_RISING>;
401 irq-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
402 reset-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
403 AVDD28-supply = <&vcc3v0_touch>;
404 VDDIO-supply = <&vcc3v0_touch>;
405 touchscreen-size-x = <720>;
406 touchscreen-size-y = <1440>;
407 };
408};
409
410&cluster0_opp {
411 opp04 {
412 status = "disabled";
413 };
414
415 opp05 {
416 status = "disabled";
417 };
418};
419
420&cluster1_opp {
421 opp06 {
422 opp-hz = /bits/ 64 <1500000000>;
423 opp-microvolt = <1100000 1100000 1150000>;
424 };
425
426 opp07 {
427 status = "disabled";
428 };
429};
430
431&io_domains {
432 bt656-supply = <&vcc1v8_dvp>;
433 audio-supply = <&vcca1v8_codec>;
434 sdmmc-supply = <&vccio_sd>;
435 gpio1830-supply = <&vcc_3v0>;
436 status = "okay";
437};
438
439&mipi_dsi {
440 status = "okay";
441 clock-master;
442
443 ports {
444 mipi_out: port@1 {
445 #address-cells = <0>;
446 #size-cells = <0>;
447 reg = <1>;
448
449 mipi_out_panel: endpoint {
450 remote-endpoint = <&mipi_in_panel>;
451 };
452 };
453 };
454
455 panel@0 {
456 compatible = "hannstar,hsd060bhw4";
457 reg = <0>;
458 backlight = <&backlight>;
459 reset-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_LOW>;
460 vcc-supply = <&vcc2v8_lcd>;
461 iovcc-supply = <&vcc1v8_lcd>;
462 pinctrl-names = "default";
463
464 port {
465 mipi_in_panel: endpoint {
466 remote-endpoint = <&mipi_out_panel>;
467 };
468 };
469 };
470};
471
472&pmu_io_domains {
473 pmu1830-supply = <&vcc_1v8>;
474 status = "okay";
475};
476
477&pinctrl {
478 buttons {
479 pwrbtn_pin: pwrbtn-pin {
480 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
481 };
482 };
483
484 pmic {
485 pmic_int_l: pmic-int-l {
486 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
487 };
488
489 vsel1_pin: vsel1-pin {
490 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
491 };
492
493 vsel2_pin: vsel2-pin {
494 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
495 };
496 };
497
498 sdio-pwrseq {
499 wifi_enable_h_pin: wifi-enable-h-pin {
500 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
501 };
502 };
503
504 sound {
505 vcc1v8_codec_en: vcc1v8-codec-en {
506 rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
507 };
508 };
509
510 wireless-bluetooth {
511 bt_wake_pin: bt-wake-pin {
512 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
513 };
514
515 bt_host_wake_pin: bt-host-wake-pin {
516 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
517 };
518
519 bt_reset_pin: bt-reset-pin {
520 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
521 };
522 };
523};
524
525&sdio0 {
526 bus-width = <4>;
527 cap-sd-highspeed;
528 cap-sdio-irq;
529 disable-wp;
530 keep-power-in-suspend;
531 mmc-pwrseq = <&wifi_pwrseq>;
532 non-removable;
533 pinctrl-names = "default";
534 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
535 sd-uhs-sdr104;
536 status = "okay";
537};
538
539&pwm0 {
540 status = "okay";
541};
542
543&saradc {
544 vref-supply = <&vcca1v8_s3>;
545 status = "okay";
546};
547
548&sdmmc {
549 bus-width = <4>;
550 cap-sd-highspeed;
551 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
552 disable-wp;
553 max-frequency = <150000000>;
554 pinctrl-names = "default";
555 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
556 vmmc-supply = <&vcc3v3_sys>;
557 vqmmc-supply = <&vccio_sd>;
558 status = "okay";
559};
560
561&sdhci {
562 bus-width = <8>;
563 mmc-hs200-1_8v;
564 non-removable;
565 status = "okay";
566};
567
568&tsadc {
569 rockchip,hw-tshut-mode = <1>;
570 rockchip,hw-tshut-polarity = <1>;
571 status = "okay";
572};
573
574&uart0 {
575 pinctrl-names = "default";
576 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
577 uart-has-rtscts;
578 status = "okay";
579
580 bluetooth {
581 compatible = "brcm,bcm4345c5";
582 clocks = <&rk818 1>;
583 clock-names = "lpo";
584 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
585 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
586 max-speed = <1500000>;
587 pinctrl-names = "default";
588 pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>;
589 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
590 vbat-supply = <&vcc3v3_sys>;
591 vddio-supply = <&vcc_1v8>;
592 };
593};
594
595&uart2 {
596 status = "okay";
597};
598
599&vopb {
600 status = "okay";
601 assigned-clocks = <&cru DCLK_VOP0_DIV>, <&cru DCLK_VOP0>,
602 <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
603 assigned-clock-rates = <0>, <0>, <400000000>, <100000000>;
604 assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP0_DIV>;
605};
606
607&vopb_mmu {
608 status = "okay";
609};
610
611&vopl {
612 status = "okay";
613 assigned-clocks = <&cru DCLK_VOP1_DIV>, <&cru DCLK_VOP1>,
614 <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
615 assigned-clock-rates = <0>, <0>, <400000000>, <100000000>;
616 assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP1_DIV>;
617};
618
619&vopl_mmu {
620 status = "okay";
621};