blob: b62cb8a51ee0f27e8f9f44ec5a249354eaa6be2f [file] [log] [blame]
Stephen Warren45b8ae62012-08-05 16:07:21 +00001/*
2 * (C) Copyright 2012 Stephen Warren
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
Tom Rinie2378802016-01-14 22:05:13 -05007 * SPDX-License-Identifier: GPL-2.0
Stephen Warren45b8ae62012-08-05 16:07:21 +00008 */
9
10#include <common.h>
11#include <asm/io.h>
12#include <asm/arch/wdog.h>
Alexander Graf3fce5342016-11-02 10:36:18 +010013#include <efi_loader.h>
Stephen Warren45b8ae62012-08-05 16:07:21 +000014
15#define RESET_TIMEOUT 10
16
Alexander Graf3fce5342016-11-02 10:36:18 +010017/*
18 * The Raspberry Pi firmware uses the RSTS register to know which partiton
19 * to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
20 * Partiton 63 is a special partition used by the firmware to indicate halt.
21 */
22#define BCM2835_WDOG_RSTS_RASPBERRYPI_HALT 0x555
23
Paolo Pisati6213c552017-02-10 17:28:05 +010024/* max ticks timeout */
25#define BCM2835_WDOG_MAX_TIMEOUT 0x000fffff
26
27#ifdef CONFIG_BCM2835_WDT
28extern void hw_watchdog_disable(void);
29#else
30void hw_watchdog_disable(void) {}
31#endif
32
Alexander Graf3fce5342016-11-02 10:36:18 +010033__efi_runtime_data struct bcm2835_wdog_regs *wdog_regs =
34 (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
35
Paolo Pisati6213c552017-02-10 17:28:05 +010036void __efi_runtime reset_cpu(ulong ticks)
Stephen Warren45b8ae62012-08-05 16:07:21 +000037{
Paolo Pisati6213c552017-02-10 17:28:05 +010038 uint32_t rstc, timeout;
39
40 if (ticks == 0) {
41 hw_watchdog_disable();
42 timeout = RESET_TIMEOUT;
43 } else
44 timeout = ticks & BCM2835_WDOG_MAX_TIMEOUT;
Stephen Warren45b8ae62012-08-05 16:07:21 +000045
Alexander Graf3fce5342016-11-02 10:36:18 +010046 rstc = readl(&wdog_regs->rstc);
Stephen Warren45b8ae62012-08-05 16:07:21 +000047 rstc &= ~BCM2835_WDOG_RSTC_WRCFG_MASK;
48 rstc |= BCM2835_WDOG_RSTC_WRCFG_FULL_RESET;
49
Paolo Pisati6213c552017-02-10 17:28:05 +010050 writel(BCM2835_WDOG_PASSWORD | timeout, &wdog_regs->wdog);
Alexander Graf3fce5342016-11-02 10:36:18 +010051 writel(BCM2835_WDOG_PASSWORD | rstc, &wdog_regs->rstc);
52}
53
54#ifdef CONFIG_EFI_LOADER
55
56void __efi_runtime EFIAPI efi_reset_system(
57 enum efi_reset_type reset_type,
58 efi_status_t reset_status,
59 unsigned long data_size, void *reset_data)
60{
61 u32 val;
62
63 switch (reset_type) {
64 case EFI_RESET_COLD:
65 case EFI_RESET_WARM:
66 reset_cpu(0);
67 break;
68 case EFI_RESET_SHUTDOWN:
69 /*
70 * We set the watchdog hard reset bit here to distinguish this reset
71 * from the normal (full) reset. bootcode.bin will not reboot after a
72 * hard reset.
73 */
74 val = readl(&wdog_regs->rsts);
75 val |= BCM2835_WDOG_PASSWORD;
76 val |= BCM2835_WDOG_RSTS_RASPBERRYPI_HALT;
77 writel(val, &wdog_regs->rsts);
78 reset_cpu(0);
79 break;
80 }
81
82 while (1) { }
83}
84
85void efi_reset_system_init(void)
86{
87 efi_add_runtime_mmio(&wdog_regs, sizeof(*wdog_regs));
Stephen Warren45b8ae62012-08-05 16:07:21 +000088}
Alexander Graf3fce5342016-11-02 10:36:18 +010089
90#endif