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git01.mediatek.com / filogic / uboot / 937fd638f25f5498bbd4f76505d4d3d4179be2ed / . / drivers / usb / host / Kconfig
blob: 5d0855ffcc7925694366c154b67eb33da02abebf [file] [log] [blame]
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]1#
2# USB Host Controller Drivers
3#
4comment "USB Host Controller Drivers"
5
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900[diff] [blame]6config USB_HOST
7 bool
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]8 select DM_USB
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900[diff] [blame]9
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]10config USB_XHCI_HCD
11 bool "xHCI HCD (USB 3.0) support"
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]12 depends on DM && OF_CONTROL
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900[diff] [blame]13 select USB_HOST
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]14 ---help---
15 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
16 "SuperSpeed" host controller hardware.
17
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]18if USB_XHCI_HCD
19
Masahiro Yamadad3b72ca2016-06-04 07:35:04 +0900[diff] [blame]20config USB_XHCI_DWC3
21 bool "DesignWare USB3 DRD Core Support"
22 help
23 Say Y or if your system has a Dual Role SuperSpeed
24 USB controller based on the DesignWare USB3 IP Core.
25
Neil Armstrong069421e2018-04-11 17:08:00 +0200[diff] [blame]26config USB_XHCI_DWC3_OF_SIMPLE
27 bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
Jean-Jacques Hiblot74d9a9d2018-04-12 10:41:10 +0200[diff] [blame]28 depends on DM_USB
Mark Kettenis06ec9132019-06-30 18:01:54 +0200[diff] [blame]29 default y if ARCH_ROCKCHIP
Jean-Jacques Hiblot6c705f42018-04-12 10:41:11 +0200[diff] [blame]30 default y if DRA7XX
Neil Armstrong069421e2018-04-11 17:08:00 +0200[diff] [blame]31 help
32 Support USB2/3 functionality in simple SoC integrations with
33 USB controller based on the DesignWare USB3 IP Core.
34
developer507fc9b2020-05-02 11:35:18 +0200[diff] [blame]35config USB_XHCI_MTK
36 bool "Support for MediaTek on-chip xHCI USB controller"
37 depends on ARCH_MEDIATEK
38 help
39 Enables support for the on-chip xHCI controller on MediaTek SoCs.
40
Stefan Roese07faf112016-07-14 11:39:20 +0200[diff] [blame]41config USB_XHCI_MVEBU
42 bool "MVEBU USB 3.0 support"
43 default y
44 depends on ARCH_MVEBU
Konstantin Porotchkin1b5ed4d2017-02-12 11:10:30 +0200[diff] [blame]45 select DM_REGULATOR
Stefan Roese07faf112016-07-14 11:39:20 +0200[diff] [blame]46 help
47 Choose this option to add support for USB 3.0 driver on mvebu
48 SoCs, which includes Armada8K, Armada3700 and other Armada
49 family SoCs.
50
Stefan Roesedf33b572020-08-24 13:04:38 +0200[diff] [blame]51config USB_XHCI_OCTEON
52 bool "Support for Marvell Octeon family on-chip xHCI USB controller"
53 depends on ARCH_OCTEON
54 default y
55 help
56 Enables support for the on-chip xHCI controller on Marvell Octeon
57 family SoCs. This is a driver for the dwc3 to provide the glue logic
58 to configure the controller.
59
Tom Riniebc1c842021-09-12 20:32:22 -0400[diff] [blame]60config USB_XHCI_OMAP
61 bool "Support for TI OMAP family xHCI USB controller"
62 depends on ARCH_OMAP2PLUS
63 help
64 Enables support for the on-chip xHCI controller found on some TI SoC
65 families. Note that some families have multiple contollers while
66 others only have something such as DesignWare-based controllers.
67 Consult the SoC documentation to determine if this option applies
68 to your hardware.
69
Bin Mengd34d6fc2017-07-19 21:50:08 +0800[diff] [blame]70config USB_XHCI_PCI
71 bool "Support for PCI-based xHCI USB controller"
Bin Meng7e8644d2017-07-19 21:51:07 +0800[diff] [blame]72 depends on DM_USB
Bin Mengd34d6fc2017-07-19 21:50:08 +0800[diff] [blame]73 default y if X86
74 help
75 Enables support for the PCI-based xHCI controller.
76
Marek Vasut24257272017-10-15 15:01:29 +0200[diff] [blame]77config USB_XHCI_RCAR
78 bool "Renesas RCar USB 3.0 support"
79 default y
80 depends on ARCH_RMOBILE
81 help
82 Choose this option to add support for USB 3.0 driver on Renesas
83 RCar Gen3 SoCs.
84
Patrice Chotardf2505b12017-09-05 11:04:24 +0200[diff] [blame]85config USB_XHCI_STI
86 bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller"
87 depends on ARCH_STI
88 default y
89 help
90 Enables support for the on-chip xHCI controller on STMicroelectronics
91 STiH407 family SoCs. This is a driver for the dwc3 to provide the glue logic
92 to configure the controller.
93
Uri Mashiachf6ff74e2017-02-23 15:39:36 +0200[diff] [blame]94config USB_XHCI_DRA7XX_INDEX
95 int "DRA7XX xHCI USB index"
96 range 0 1
97 default 0
98 depends on DRA7XX
99 help
100 Select the DRA7XX xHCI USB index.
101 Current supported values: 0, 1.
102
Ran Wanga5a97352017-10-23 10:09:22 +0800[diff] [blame]103config USB_XHCI_FSL
104 bool "Support for NXP Layerscape on-chip xHCI USB controller"
105 default y if ARCH_LS1021A || FSL_LSCH3 || FSL_LSCH2
106 depends on !SPL_NO_USB
107 help
108 Enables support for the on-chip xHCI controller on NXP Layerscape SoCs.
Rayagonda Kokatanurf59d24e2020-04-09 09:23:15 +0530[diff] [blame]109
110config USB_XHCI_BRCM
111 bool "Broadcom USB3 Host XHCI controller"
112 depends on DM_USB
113 help
114 USB controller based on the Broadcom USB3 IP Core.
115 Supports USB2/3 functionality.
116
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900[diff] [blame]117endif # USB_XHCI_HCD
Alexey Brodkin83fd3122015-12-14 17:18:50 +0300[diff] [blame]118
Tom Rini21ad2802022-06-08 08:24:26 -0400[diff] [blame]119config EHCI_DESC_BIG_ENDIAN
120 bool
121
122config EHCI_MMIO_BIG_ENDIAN
123 bool
124
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]125config USB_EHCI_HCD
126 bool "EHCI HCD (USB 2.0) support"
Tom Rini7716cd62017-05-12 22:33:28 -0400[diff] [blame]127 default y if ARCH_MX5 || ARCH_MX6
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]128 depends on DM && OF_CONTROL
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900[diff] [blame]129 select USB_HOST
Tom Rini21ad2802022-06-08 08:24:26 -0400[diff] [blame]130 select EHCI_DESC_BIG_ENDIAN if SYS_BIG_ENDIAN
131 select EHCI_MMIO_BIG_ENDIAN if SYS_BIG_ENDIAN
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]132 ---help---
133 The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
134 "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
135 If your USB host controller supports USB 2.0, you will likely want to
136 configure this Host Controller Driver.
137
138 EHCI controllers are packaged with "companion" host controllers (OHCI
139 or UHCI) to handle USB 1.1 devices connected to root hub ports. Ports
140 will connect to EHCI if the device is high speed, otherwise they
141 connect to a companion controller. If you configure EHCI, you should
142 probably configure the OHCI (for NEC and some other vendors) USB Host
143 Controller Driver or UHCI (for Via motherboards) Host Controller
144 Driver too.
145
146 You may want to read <file:Documentation/usb/ehci.txt>.
147
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +0900[diff] [blame]148if USB_EHCI_HCD
149
Marek Behúne1489262021-10-09 15:27:35 +0200[diff] [blame]150config USB_EHCI_IS_TDI
151 bool
152
Wenyou Yang11e26652016-08-05 08:57:35 +0800[diff] [blame]153config USB_EHCI_ATMEL
154 bool "Support for Atmel on-chip EHCI USB controller"
155 depends on ARCH_AT91
156 default y
157 ---help---
158 Enables support for the on-chip EHCI controller on Atmel chips.
159
Stefan Roese03901022015-09-01 11:39:44 +0200[diff] [blame]160config USB_EHCI_MARVELL
Tom Rini496a4172017-05-12 22:33:29 -0400[diff] [blame]161 bool "Support for Marvell on-chip EHCI USB controller"
Trevor Woernerbb7ab072020-05-06 08:02:40 -0400[diff] [blame]162 depends on ARCH_MVEBU || ARCH_KIRKWOOD || ARCH_ORION5X
Stefan Roese03901022015-09-01 11:39:44 +0200[diff] [blame]163 default y
Marek Behúne1489262021-10-09 15:27:35 +0200[diff] [blame]164 select USB_EHCI_IS_TDI if !ARM64
Stefan Roese03901022015-09-01 11:39:44 +0200[diff] [blame]165 ---help---
166 Enables support for the on-chip EHCI controller on MVEBU SoCs.
167
Lukasz Majewski6fccaf22019-04-04 12:26:55 +0200[diff] [blame]168config USB_EHCI_MX5
169 bool "Support for i.MX5 on-chip EHCI USB controller"
170 depends on ARCH_MX5
Lukasz Majewski6fccaf22019-04-04 12:26:55 +0200[diff] [blame]171 help
172 Enables support for the on-chip EHCI controller on i.MX5 SoCs.
173
Nikita Kiryanov99241032015-07-23 17:19:35 +0300[diff] [blame]174config USB_EHCI_MX6
Ye Li9da57ea2019-10-24 10:29:32 -0300[diff] [blame]175 bool "Support for i.MX6/i.MX7ULP on-chip EHCI USB controller"
Giulio Benetti13ded2c2021-05-20 16:10:15 +0200[diff] [blame]176 depends on ARCH_MX6 || ARCH_MX7ULP || ARCH_IMXRT
Tom Rini21ad2802022-06-08 08:24:26 -0400[diff] [blame]177 select EHCI_HCD_INIT_AFTER_RESET
Nikita Kiryanov99241032015-07-23 17:19:35 +0300[diff] [blame]178 default y
179 ---help---
180 Enables support for the on-chip EHCI controller on i.MX6 SoCs.
181
Stefan Agner100fe072016-07-13 00:25:36 -0700[diff] [blame]182config USB_EHCI_MX7
183 bool "Support for i.MX7 on-chip EHCI USB controller"
Marek Vasute15971f2021-04-02 14:07:22 +0200[diff] [blame]184 depends on ARCH_MX7 || IMX8M
Tom Rini21ad2802022-06-08 08:24:26 -0400[diff] [blame]185 select EHCI_HCD_INIT_AFTER_RESET if ARCH_MX7
Marek Vasute15971f2021-04-02 14:07:22 +0200[diff] [blame]186 select PHY if IMX8M
187 select NOP_PHY if IMX8M
Stefan Agner100fe072016-07-13 00:25:36 -0700[diff] [blame]188 default y
189 ---help---
190 Enables support for the on-chip EHCI controller on i.MX7 SoCs.
191
Marek Behún53d53512021-10-09 15:27:33 +0200[diff] [blame]192config USB_EHCI_MXS
Lukasz Majewski7a4aba62021-12-22 10:55:06 +0100[diff] [blame]193 bool "Support for i.MX23/i.MX28 EHCI USB controller"
194 depends on ARCH_MX23 || ARCH_MX28
Marek Behún53d53512021-10-09 15:27:33 +0200[diff] [blame]195 default y
Marek Behúne1489262021-10-09 15:27:35 +0200[diff] [blame]196 select USB_EHCI_IS_TDI
Marek Behún53d53512021-10-09 15:27:33 +0200[diff] [blame]197 help
Lukasz Majewski7a4aba62021-12-22 10:55:06 +0100[diff] [blame]198 Enables support for the on-chip EHCI controller on i.MX23 and
199 i.MX28 SoCs.
Marek Behún53d53512021-10-09 15:27:33 +0200[diff] [blame]200
Tom Rini639a8402017-05-12 22:33:30 -0400[diff] [blame]201config USB_EHCI_OMAP
202 bool "Support for OMAP3+ on-chip EHCI USB controller"
203 depends on ARCH_OMAP2PLUS
Adam Fordcb9a3562022-02-19 17:08:44 -0600[diff] [blame]204 select PHY
205 imply NOP_PHY
Tom Rini639a8402017-05-12 22:33:30 -0400[diff] [blame]206 default y
207 ---help---
208 Enables support for the on-chip EHCI controller on OMAP3 and later
209 SoCs.
210
Marcel Ziswiler31f44952019-03-25 17:24:54 +0100[diff] [blame]211config USB_EHCI_VF
212 bool "Support for Vybrid on-chip EHCI USB controller"
213 depends on ARCH_VF610
214 default y
215 help
216 Enables support for the on-chip EHCI controller on Vybrid SoCs.
217
Ye Li9da57ea2019-10-24 10:29:32 -0300[diff] [blame]218if USB_EHCI_MX6 || USB_EHCI_MX7
Stefan Agner8652ce92016-07-13 00:25:38 -0700[diff] [blame]219
220config MXC_USB_OTG_HACTIVE
221 bool "USB Power pin high active"
222 ---help---
223 Set the USB Power pin polarity to be high active (PWR_POL)
224
225endif
226
Mateusz Kulikowskidc381172016-03-31 23:12:26 +0200[diff] [blame]227config USB_EHCI_MSM
228 bool "Support for Qualcomm on-chip EHCI USB controller"
229 depends on DM_USB
230 select USB_ULPI_VIEWPORT
Ramon Fried7e365962018-09-21 13:35:50 +0300[diff] [blame]231 select MSM8916_USB_PHY
Mateusz Kulikowskidc381172016-03-31 23:12:26 +0200[diff] [blame]232 ---help---
233 Enables support for the on-chip EHCI controller on Qualcomm
234 Snapdragon SoCs.
Mateusz Kulikowskidc381172016-03-31 23:12:26 +0200[diff] [blame]235
Bin Mengec4b5732017-08-09 00:21:54 -0700[diff] [blame]236config USB_EHCI_PCI
237 bool "Support for PCI-based EHCI USB controller"
238 default y if X86
239 help
240 Enables support for the PCI-based EHCI controller.
241
Peter Robinson43ecef42019-02-20 12:17:27 +0000[diff] [blame]242config USB_EHCI_TEGRA
243 bool "Support for NVIDIA Tegra on-chip EHCI USB controller"
Trevor Woerner513f6402020-05-06 08:02:41 -0400[diff] [blame]244 depends on ARCH_TEGRA
Marek Behúne1489262021-10-09 15:27:35 +0200[diff] [blame]245 select USB_EHCI_IS_TDI
Peter Robinson43ecef42019-02-20 12:17:27 +0000[diff] [blame]246 ---help---
247 Enable support for Tegra on-chip EHCI USB controller
248
Siva Durga Prasad Paladugu42fcc182016-07-22 14:51:51 +0530[diff] [blame]249config USB_EHCI_ZYNQ
250 bool "Support for Xilinx Zynq on-chip EHCI USB controller"
Michal Simek3239d712020-08-24 14:41:51 +0200[diff] [blame]251 default y if ARCH_ZYNQ
Marek Behúne1489262021-10-09 15:27:35 +0200[diff] [blame]252 select USB_EHCI_IS_TDI
Siva Durga Prasad Paladugu42fcc182016-07-22 14:51:51 +0530[diff] [blame]253 ---help---
254 Enable support for Zynq on-chip EHCI USB controller
255
Alexey Brodkina6aff432015-12-02 12:32:02 +0300[diff] [blame]256config USB_EHCI_GENERIC
257 bool "Support for generic EHCI USB controller"
Alexey Brodkina6aff432015-12-02 12:32:02 +0300[diff] [blame]258 depends on DM_USB
Jagan Teki1ba41e12018-12-22 18:18:10 +0530[diff] [blame]259 default ARCH_SUNXI
Alexey Brodkina6aff432015-12-02 12:32:02 +0300[diff] [blame]260 ---help---
261 Enables support for generic EHCI controller.
262
Tom Rini30fd3d92022-06-08 08:24:27 -0400[diff] [blame]263config EHCI_HCD_INIT_AFTER_RESET
264 bool
265
Ran Wang9798b662017-12-20 10:34:20 +0800[diff] [blame]266config USB_EHCI_FSL
267 bool "Support for FSL on-chip EHCI USB controller"
Tom Rini30fd3d92022-06-08 08:24:27 -0400[diff] [blame]268 select EHCI_HCD_INIT_AFTER_RESET
Ran Wang9798b662017-12-20 10:34:20 +0800[diff] [blame]269 ---help---
270 Enables support for the on-chip EHCI controller on FSL chips.
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900[diff] [blame]271endif # USB_EHCI_HCD
272
273config USB_OHCI_HCD
274 bool "OHCI HCD (USB 1.1) support"
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]275 depends on DM && OF_CONTROL
276 select USB_HOST
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900[diff] [blame]277 ---help---
278 The Open Host Controller Interface (OHCI) is a standard for accessing
279 USB 1.1 host controller hardware. It does more in hardware than Intel's
280 UHCI specification. If your USB host controller follows the OHCI spec,
281 say Y. On most non-x86 systems, and on x86 hardware that's not using a
282 USB controller from Intel or VIA, this is appropriate. If your host
283 controller doesn't use PCI, this is probably appropriate. For a PCI
284 based system where you're not sure, the "lspci -v" entry will list the
285 right "prog-if" for your USB controller(s): EHCI, OHCI, or UHCI.
286
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]287if USB_OHCI_HCD
288
Heiko Schocher124f9472019-07-16 10:49:07 +0200[diff] [blame]289config USB_OHCI_PCI
290 bool "Support for PCI-based OHCI USB controller"
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]291 depends on PCI
Heiko Schocher124f9472019-07-16 10:49:07 +0200[diff] [blame]292 help
293 Enables support for the PCI-based OHCI controller.
294
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900[diff] [blame]295config USB_OHCI_GENERIC
296 bool "Support for generic OHCI USB controller"
Jagan Teki1ba41e12018-12-22 18:18:10 +0530[diff] [blame]297 default ARCH_SUNXI
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900[diff] [blame]298 ---help---
299 Enables support for generic OHCI controller.
300
Adam Ford5f364f52019-04-30 05:21:41 -0500[diff] [blame]301config USB_OHCI_DA8XX
302 bool "Support for da850 OHCI USB controller"
303 help
304 Enable support for the da850 USB controller.
305
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900[diff] [blame]306endif # USB_OHCI_HCD
Masahiro Yamada718ba3c2016-08-01 00:16:33 +0900[diff] [blame]307
308config USB_UHCI_HCD
309 bool "UHCI HCD (most Intel and VIA) support"
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900[diff] [blame]310 select USB_HOST
Masahiro Yamada718ba3c2016-08-01 00:16:33 +0900[diff] [blame]311 ---help---
312 The Universal Host Controller Interface is a standard by Intel for
313 accessing the USB hardware in the PC (which is also called the USB
314 host controller). If your USB host controller conforms to this
315 standard, you may want to say Y, but see below. All recent boards
316 with Intel PCI chipsets (like intel 430TX, 440FX, 440LX, 440BX,
317 i810, i820) conform to this standard. Also all VIA PCI chipsets
318 (like VIA VP2, VP3, MVP3, Apollo Pro, Apollo Pro II or Apollo Pro
319 133) and LEON/GRLIB SoCs with the GRUSBHC controller.
320 If unsure, say Y.
321
322if USB_UHCI_HCD
323
324endif # USB_UHCI_HCD
Philipp Tomsich54983812017-07-03 18:30:06 +0200[diff] [blame]325
326config USB_DWC2
327 bool "DesignWare USB2 Core support"
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]328 depends on DM && OF_CONTROL
Philipp Tomsich54983812017-07-03 18:30:06 +0200[diff] [blame]329 select USB_HOST
330 ---help---
331 The DesignWare USB 2.0 controller is compliant with the
332 USB-Implementers Forum (USB-IF) USB 2.0 specifications.
333 Hi-Speed (480 Mbps), Full-Speed (12 Mbps), and Low-Speed (1.5 Mbps)
334 operation is compliant to the controller Supplement. If you want to
335 enable this controller in host mode, say Y.
Alexey Brodkinf19414b2018-02-28 16:16:58 +0300[diff] [blame]336
337if USB_DWC2
338config USB_DWC2_BUFFER_SIZE
339 int "Data buffer size in kB"
340 default 64
341 ---help---
342 By default 64 kB buffer is used but if amount of RAM avaialble on
343 the target is not enough to accommodate allocation of buffer of
344 that size it is possible to shrink it. Smaller sizes should be fine
345 because larger transactions could be split in smaller ones.
346
347endif # USB_DWC2
Marek Vasut88016032019-08-11 13:23:43 +0200[diff] [blame]348
349config USB_R8A66597_HCD
350 bool "Renesas R8A66597 USB Core support"
Tom Rini5b9e6162021-07-09 10:11:56 -0400[diff] [blame]351 depends on DM && OF_CONTROL
Marek Vasut88016032019-08-11 13:23:43 +0200[diff] [blame]352 select USB_HOST
353 ---help---
354 This enables support for the on-chip Renesas R8A66597 USB 2.0
355 controller, present in various RZ and SH SoCs.