| Eugen Hristev | 3263e74 | 2020-08-27 11:51:52 +0300 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Chip-specific header file for the SAMA7G5 SoC |
| 4 | * |
| 5 | * Copyright (C) 2020 Microchip Technology, Inc. and its subsidiaries |
| 6 | * Eugen Hristev <eugen.hristev@microchip.com> |
| 7 | */ |
| 8 | |
| 9 | #ifndef __SAMA7G5_H__ |
| 10 | #define __SAMA7G5_H__ |
| 11 | |
| 12 | /* |
| 13 | * Peripheral identifiers/interrupts. |
| 14 | */ |
| 15 | #define ATMEL_ID_FLEXCOM0 38 |
| 16 | #define ATMEL_ID_FLEXCOM1 39 |
| 17 | #define ATMEL_ID_FLEXCOM2 40 |
| 18 | #define ATMEL_ID_FLEXCOM3 41 |
| 19 | |
| 20 | #define ATMEL_ID_SDMMC0 80 |
| 21 | #define ATMEL_ID_SDMMC1 81 |
| 22 | |
| 23 | #define ATMEL_ID_PIT64B0 70 |
| 24 | #define ATMEL_ID_PIT64B ATMEL_ID_PIT64B0 |
| 25 | |
| 26 | #define ATMEL_CHIPID_CIDR 0xe0020000 |
| 27 | #define ATMEL_CHIPID_EXID 0xe0020004 |
| 28 | /* |
| 29 | * User Peripherals physical base addresses. |
| 30 | */ |
| 31 | #define ATMEL_BASE_PIOA 0xe0014000 |
| 32 | #define ATMEL_BASE_PIOB (ATMEL_BASE_PIOA + 0x40) |
| 33 | #define ATMEL_BASE_PIOC (ATMEL_BASE_PIOB + 0x40) |
| 34 | #define ATMEL_BASE_PIOD (ATMEL_BASE_PIOC + 0x40) |
| 35 | #define ATMEL_BASE_PIOE (ATMEL_BASE_PIOD + 0x40) |
| 36 | |
| 37 | #define ATMEL_PIO_PORTS 5 |
| 38 | |
| 39 | #define CPU_HAS_PCR |
| 40 | |
| 41 | #define ATMEL_BASE_PMC 0xe0018000 |
| 42 | |
| 43 | #define ATMEL_BASE_WDT 0xe001c000 |
| 44 | #define ATMEL_BASE_RSTC 0xe001d000 |
| 45 | #define ATMEL_BASE_WDTS 0xe001d180 |
| 46 | #define ATMEL_BASE_SCKCR 0xe001d050 |
| 47 | |
| 48 | #define ATMEL_BASE_SDMMC0 0xe1204000 |
| 49 | #define ATMEL_BASE_SDMMC1 0xe1208000 |
| 50 | |
| 51 | #define ATMEL_BASE_PIT64B0 0xe1800000 |
| 52 | |
| 53 | #define ATMEL_BASE_FLEXCOM0 0xe1818000 |
| 54 | #define ATMEL_BASE_FLEXCOM1 0xe181c000 |
| 55 | #define ATMEL_BASE_FLEXCOM2 0xe1820000 |
| 56 | #define ATMEL_BASE_FLEXCOM3 0xe1824000 |
| 57 | #define ATMEL_BASE_FLEXCOM4 0xe2018000 |
| 58 | |
| 59 | #define ATMEL_BASE_TZC400 0xe3000000 |
| 60 | |
| 61 | #define ATMEL_BASE_UMCTL2 0xe3800000 |
| 62 | #define ATMEL_BASE_UMCTL2_MP 0xe38003f8 |
| 63 | #define ATMEL_BASE_PUBL 0xe3804000 |
| 64 | |
| 65 | #define ATMEL_NUM_FLEXCOM 12 |
| 66 | #define ATMEL_PIO_PORTS 5 |
| 67 | |
| 68 | #define ATMEL_BASE_PIT64BC ATMEL_BASE_PIT64B0 |
| 69 | |
| Mihai Sain | 3e357d1 | 2022-12-02 09:47:19 +0200 | [diff] [blame] | 70 | /* SAMA7G5 series chip id definitions */ |
| 71 | #define ARCH_ID_SAMA7G5 0x80162100 |
| 72 | #define ARCH_EXID_SAMA7G51 0x00000003 |
| 73 | #define ARCH_EXID_SAMA7G52 0x00000002 |
| 74 | #define ARCH_EXID_SAMA7G53 0x00000001 |
| 75 | #define ARCH_EXID_SAMA7G54 0x00000000 |
| 76 | #define ARCH_EXID_SAMA7G54_D1G 0x00000018 |
| 77 | #define ARCH_EXID_SAMA7G54_D2G 0x00000020 |
| 78 | #define ARCH_EXID_SAMA7G54_D4G 0x00000028 |
| 79 | |
| 80 | #define cpu_is_sama7g5() (get_chip_id() == ARCH_ID_SAMA7G5) |
| 81 | #define cpu_is_sama7g51() (cpu_is_sama7g5() && \ |
| 82 | (get_extension_chip_id() == ARCH_EXID_SAMA7G51)) |
| 83 | #define cpu_is_sama7g52() (cpu_is_sama7g5() && \ |
| 84 | (get_extension_chip_id() == ARCH_EXID_SAMA7G52)) |
| 85 | #define cpu_is_sama7g53() (cpu_is_sama7g5() && \ |
| 86 | (get_extension_chip_id() == ARCH_EXID_SAMA7G53)) |
| 87 | #define cpu_is_sama7g54() (cpu_is_sama7g5() && \ |
| 88 | (get_extension_chip_id() == ARCH_EXID_SAMA7G54)) |
| 89 | #define cpu_is_sama7g54d1g() (cpu_is_sama7g5() && \ |
| 90 | (get_extension_chip_id() == ARCH_EXID_SAMA7G54_D1G)) |
| 91 | #define cpu_is_sama7g54d2g() (cpu_is_sama7g5() && \ |
| 92 | (get_extension_chip_id() == ARCH_EXID_SAMA7G54_D2G)) |
| 93 | #define cpu_is_sama7g54d4g() (cpu_is_sama7g5() && \ |
| 94 | (get_extension_chip_id() == ARCH_EXID_SAMA7G54_D4G)) |
| 95 | |
| Eugen Hristev | 3263e74 | 2020-08-27 11:51:52 +0300 | [diff] [blame] | 96 | #ifndef __ASSEMBLY__ |
| Mihai Sain | 3e357d1 | 2022-12-02 09:47:19 +0200 | [diff] [blame] | 97 | unsigned int get_chip_id(void); |
| 98 | unsigned int get_extension_chip_id(void); |
| Eugen Hristev | 3263e74 | 2020-08-27 11:51:52 +0300 | [diff] [blame] | 99 | char *get_cpu_name(void); |
| 100 | #endif |
| 101 | |
| 102 | #endif /* #ifndef __SAMA7G5_H__ */ |