| Mike Frysinger | 66c4cf4 | 2008-02-04 19:26:55 -0500 | [diff] [blame] | 1 | /* |
| 2 | * SPORT Masks |
| 3 | */ |
| 4 | |
| 5 | #ifndef __BFIN_PERIPHERAL_SPORT__ |
| 6 | #define __BFIN_PERIPHERAL_SPORT__ |
| 7 | |
| 8 | /* SPORTx_TCR1 Masks */ |
| 9 | #define TSPEN 0x0001 /* TX enable */ |
| 10 | #define ITCLK 0x0002 /* Internal TX Clock Select */ |
| 11 | #define TDTYPE 0x000C /* TX Data Formatting Select */ |
| 12 | #define DTYPE_NORM 0x0004 /* Data Format Normal */ |
| 13 | #define DTYPE_ULAW 0x0008 /* Compand Using u-Law */ |
| 14 | #define DTYPE_ALAW 0x000C /* Compand Using A-Law */ |
| 15 | #define TLSBIT 0x0010 /* TX Bit Order */ |
| 16 | #define ITFS 0x0200 /* Internal TX Frame Sync Select */ |
| 17 | #define TFSR 0x0400 /* TX Frame Sync Required Select */ |
| 18 | #define DITFS 0x0800 /* Data Independent TX Frame Sync Select */ |
| 19 | #define LTFS 0x1000 /* Low TX Frame Sync Select */ |
| 20 | #define LATFS 0x2000 /* Late TX Frame Sync Select */ |
| 21 | #define TCKFE 0x4000 /* TX Clock Falling Edge Select */ |
| 22 | |
| 23 | /* SPORTx_TCR2 Masks */ |
| 24 | #define SLEN 0x001F /* TX Word Length */ |
| 25 | #define TXSE 0x0100 /* TX Secondary Enable */ |
| 26 | #define TSFSE 0x0200 /* TX Stereo Frame Sync Enable */ |
| 27 | #define TRFST 0x0400 /* TX Right-First Data Order */ |
| 28 | |
| 29 | /* SPORTx_RCR1 Masks */ |
| 30 | #define RSPEN 0x0001 /* RX enable */ |
| 31 | #define IRCLK 0x0002 /* Internal RX Clock Select */ |
| 32 | #define RDTYPE 0x000C /* RX Data Formatting Select */ |
| 33 | #define DTYPE_NORM 0x0004 /* Data Format Normal */ |
| 34 | #define DTYPE_ULAW 0x0008 /* Compand Using u-Law */ |
| 35 | #define DTYPE_ALAW 0x000C /* Compand Using A-Law */ |
| 36 | #define RLSBIT 0x0010 /* RX Bit Order */ |
| 37 | #define IRFS 0x0200 /* Internal RX Frame Sync Select */ |
| 38 | #define RFSR 0x0400 /* RX Frame Sync Required Select */ |
| 39 | #define LRFS 0x1000 /* Low RX Frame Sync Select */ |
| 40 | #define LARFS 0x2000 /* Late RX Frame Sync Select */ |
| 41 | #define RCKFE 0x4000 /* RX Clock Falling Edge Select */ |
| 42 | |
| 43 | /* SPORTx_RCR2 Masks */ |
| 44 | #define SLEN 0x001F /* RX Word Length */ |
| 45 | #define RXSE 0x0100 /* RX Secondary Enable */ |
| 46 | #define RSFSE 0x0200 /* RX Stereo Frame Sync Enable */ |
| 47 | #define RRFST 0x0400 /* Right-First Data Order */ |
| 48 | |
| 49 | /* SPORTx_STAT Masks */ |
| 50 | #define RXNE 0x0001 /* RX FIFO Not Empty Status */ |
| 51 | #define RUVF 0x0002 /* RX Underflow Status */ |
| 52 | #define ROVF 0x0004 /* RX Overflow Status */ |
| 53 | #define TXF 0x0008 /* TX FIFO Full Status */ |
| 54 | #define TUVF 0x0010 /* TX Underflow Status */ |
| 55 | #define TOVF 0x0020 /* TX Overflow Status */ |
| 56 | #define TXHRE 0x0040 /* TX Hold Register Empty */ |
| 57 | |
| 58 | /* SPORTx_MCMC1 Masks */ |
| 59 | #define WSIZE 0xF000 /* Multichannel Window Size Field */ |
| 60 | #define WOFF 0x03FF /* Multichannel Window Offset Field */ |
| 61 | |
| 62 | /* SPORTx_MCMC2 Masks */ |
| 63 | #define MCCRM 0x0003 /* Multichannel Clock Recovery Mode */ |
| 64 | #define REC_BYPASS 0x0000 /* Bypass Mode (No Clock Recovery) */ |
| 65 | #define REC_2FROM4 0x0002 /* Recover 2 MHz Clock from 4 MHz Clock */ |
| 66 | #define REC_8FROM16 0x0003 /* Recover 8 MHz Clock from 16 MHz Clock */ |
| 67 | #define MCDTXPE 0x0004 /* Multichannel DMA Transmit Packing */ |
| 68 | #define MCDRXPE 0x0008 /* Multichannel DMA Receive Packing */ |
| 69 | #define MCMEN 0x0010 /* Multichannel Frame Mode Enable */ |
| 70 | #define FSDR 0x0080 /* Multichannel Frame Sync to Data Relationship */ |
| 71 | #define MFD 0xF000 /* Multichannel Frame Delay */ |
| 72 | #define MFD_0 0x0000 /* Multichannel Frame Delay = 0 */ |
| 73 | #define MFD_1 0x1000 /* Multichannel Frame Delay = 1 */ |
| 74 | #define MFD_2 0x2000 /* Multichannel Frame Delay = 2 */ |
| 75 | #define MFD_3 0x3000 /* Multichannel Frame Delay = 3 */ |
| 76 | #define MFD_4 0x4000 /* Multichannel Frame Delay = 4 */ |
| 77 | #define MFD_5 0x5000 /* Multichannel Frame Delay = 5 */ |
| 78 | #define MFD_6 0x6000 /* Multichannel Frame Delay = 6 */ |
| 79 | #define MFD_7 0x7000 /* Multichannel Frame Delay = 7 */ |
| 80 | #define MFD_8 0x8000 /* Multichannel Frame Delay = 8 */ |
| 81 | #define MFD_9 0x9000 /* Multichannel Frame Delay = 9 */ |
| 82 | #define MFD_10 0xA000 /* Multichannel Frame Delay = 10 */ |
| 83 | #define MFD_11 0xB000 /* Multichannel Frame Delay = 11 */ |
| 84 | #define MFD_12 0xC000 /* Multichannel Frame Delay = 12 */ |
| 85 | #define MFD_13 0xD000 /* Multichannel Frame Delay = 13 */ |
| 86 | #define MFD_14 0xE000 /* Multichannel Frame Delay = 14 */ |
| 87 | #define MFD_15 0xF000 /* Multichannel Frame Delay = 15 */ |
| 88 | |
| 89 | #endif |