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Sergey Lapin77e524c2008-10-31 12:28:43 +01001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#include <common.h>
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010028#include <asm/arch/hardware.h>
Sergey Lapin77e524c2008-10-31 12:28:43 +010029#include <asm/arch/gpio.h>
30#include <asm/arch/at91_pio.h>
31
32#include <nand.h>
33
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010034static void at91_nand_hwcontrol(struct mtd_info *mtd,
Sergey Lapin77e524c2008-10-31 12:28:43 +010035 int cmd, unsigned int ctrl)
36{
37 struct nand_chip *this = mtd->priv;
38
39 if (ctrl & NAND_CTRL_CHANGE) {
40 ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010041 IO_ADDR_W &= ~(CONFIG_SYS_NAND_MASK_ALE
42 | CONFIG_SYS_NAND_MASK_CLE);
Sergey Lapin77e524c2008-10-31 12:28:43 +010043
44 if (ctrl & NAND_CLE)
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010045 IO_ADDR_W |= CONFIG_SYS_NAND_MASK_CLE;
Sergey Lapin77e524c2008-10-31 12:28:43 +010046 if (ctrl & NAND_ALE)
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010047 IO_ADDR_W |= CONFIG_SYS_NAND_MASK_ALE;
Sergey Lapin77e524c2008-10-31 12:28:43 +010048
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010049 at91_set_gpio_value(CONFIG_SYS_NAND_ENABLE_PIN,
50 !(ctrl & NAND_NCE));
Sergey Lapin77e524c2008-10-31 12:28:43 +010051 this->IO_ADDR_W = (void *) IO_ADDR_W;
52 }
53
54 if (cmd != NAND_CMD_NONE)
55 writeb(cmd, this->IO_ADDR_W);
56}
57
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010058#ifdef CONFIG_SYS_NAND_READY_PIN
59static int at91_nand_ready(struct mtd_info *mtd)
Sergey Lapin77e524c2008-10-31 12:28:43 +010060{
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010061 return at91_get_gpio_value(CONFIG_SYS_NAND_READY_PIN);
Sergey Lapin77e524c2008-10-31 12:28:43 +010062}
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010063#endif
Sergey Lapin77e524c2008-10-31 12:28:43 +010064
65int board_nand_init(struct nand_chip *nand)
66{
67 nand->ecc.mode = NAND_ECC_SOFT;
68#ifdef CONFIG_SYS_NAND_DBW_16
69 nand->options = NAND_BUSWIDTH_16;
70#endif
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010071 nand->cmd_ctrl = at91_nand_hwcontrol;
72#ifdef CONFIG_SYS_NAND_READY_PIN
73 nand->dev_ready = at91_nand_ready;
74#endif
Sergey Lapin77e524c2008-10-31 12:28:43 +010075 nand->chip_delay = 20;
76
77 return 0;
78}