blob: 0b7d9ef8d18eb1e0d1d9038684525add1a727523 [file] [log] [blame]
Peter Tyseredb9d592009-06-30 17:26:01 -05001/*
2 * Copyright 2008 Freescale Semiconductor, Inc.
3 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <asm/fsl_law.h>
28#include <asm/mmu.h>
29
30/*
31 * Notes:
32 * CCSRBAR don't need a configured Local Access Window.
33 * If flash is 8M at default position (last 8M), no LAW needed.
34 */
35
36struct law_entry law_table[] = {
37 SET_LAW(CONFIG_SYS_FLASH_BASE2, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
38#ifdef CONFIG_SYS_NAND_BASE
39 /* NAND LAW covers 2 NAND flashes */
40 SET_LAW(CONFIG_SYS_NAND_BASE, LAW_SIZE_512K, LAW_TRGT_IF_LBC),
41#endif
42#ifdef CONFIG_SYS_PCIE1_MEM_PHYS
43 SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_1G, LAW_TRGT_IF_PCIE_1),
44 SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_1),
45#endif
46#ifdef CONFIG_SYS_PCIE2_MEM_PHYS
47 SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2),
48 SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_2),
49#endif
50};
51
52int num_law_entries = ARRAY_SIZE(law_table);