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git01.mediatek.com / filogic / uboot / c7d983a6658d807081ca64eea6fbefaa16c11578 / . / board / freescale / m54455evb / u-boot.int
blob: 4d504a22f1ea5835c4efb632f4dd9ac51e19ea78 [file] [log] [blame]
TsiChungLiew0573a7a2007-11-07 18:00:54 -0600[diff] [blame]1/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(m68k)
TsiChungLiew0573a7a2007-11-07 18:00:54 -0600[diff] [blame]25/* Do we need any of these for elf?
26 __DYNAMIC = 0; */
27SECTIONS
28{
29 /* Read-only sections, merged into text segment: */
30 . = + SIZEOF_HEADERS;
31 .interp : { *(.interp) }
32 .hash : { *(.hash) }
33 .dynsym : { *(.dynsym) }
34 .dynstr : { *(.dynstr) }
35 .rel.text : { *(.rel.text) }
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]36 .rela.text : { *(.rela.text) }
TsiChungLiew0573a7a2007-11-07 18:00:54 -0600[diff] [blame]37 .rel.data : { *(.rel.data) }
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]38 .rela.data : { *(.rela.data) }
39 .rel.rodata : { *(.rel.rodata) }
40 .rela.rodata : { *(.rela.rodata) }
TsiChungLiew0573a7a2007-11-07 18:00:54 -0600[diff] [blame]41 .rel.got : { *(.rel.got) }
42 .rela.got : { *(.rela.got) }
43 .rel.ctors : { *(.rel.ctors) }
44 .rela.ctors : { *(.rela.ctors) }
45 .rel.dtors : { *(.rel.dtors) }
46 .rela.dtors : { *(.rela.dtors) }
47 .rel.bss : { *(.rel.bss) }
48 .rela.bss : { *(.rela.bss) }
49 .rel.plt : { *(.rel.plt) }
50 .rela.plt : { *(.rela.plt) }
51 .init : { *(.init) }
52 .plt : { *(.plt) }
53 .text :
54 {
55 /* WARNING - the following is hand-optimized to fit within */
56 /* the sector layout of our flash chips! XXX FIXME XXX */
57
58 cpu/mcf5445x/start.o (.text)
59 lib_m68k/traps.o (.text)
60 lib_m68k/interrupts.o (.text)
61 common/dlmalloc.o (.text)
62 lib_generic/zlib.o (.text)
63
64 *(.text)
65 *(.fixup)
66 *(.got1)
67 }
68 _etext = .;
69 PROVIDE (etext = .);
70 .rodata :
71 {
72 *(.rodata)
73 *(.rodata1)
74 }
75 .fini : { *(.fini) } =0
76 .ctors : { *(.ctors) }
77 .dtors : { *(.dtors) }
78
79 /* Read-write section, merged into data segment: */
80 . = (. + 0x00FF) & 0xFFFFFF00;
81 _erotext = .;
82 PROVIDE (erotext = .);
83
84 .reloc :
85 {
86 __got_start = .;
87 *(.got)
88 __got_end = .;
89 _GOT2_TABLE_ = .;
90 *(.got2)
91 _FIXUP_TABLE_ = .;
92 *(.fixup)
93 }
94 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
95 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
96
97 .data :
98 {
99 *(.data)
100 *(.data1)
101 *(.sdata)
102 *(.sdata2)
103 *(.dynamic)
104 CONSTRUCTORS
105 }
106 _edata = .;
107 PROVIDE (edata = .);
108
109 . = .;
110 __u_boot_cmd_start = .;
111 .u_boot_cmd : { *(.u_boot_cmd) }
112 __u_boot_cmd_end = .;
113
114
115 . = .;
116 __start___ex_table = .;
117 __ex_table : { *(__ex_table) }
118 __stop___ex_table = .;
119
120 . = ALIGN(256);
121 __init_begin = .;
122 .text.init : { *(.text.init) }
123 .data.init : { *(.data.init) }
124 . = ALIGN(256);
125 __init_end = .;
126
127 __bss_start = .;
128 .bss :
129 {
130 _sbss = .;
131 *(.sbss) *(.scommon)
132 *(.dynbss)
133 *(.bss)
134 *(COMMON)
135 . = ALIGN(4);
136 _ebss = .;
137 }
138 _end = . ;
139 PROVIDE (end = .);
140}