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git01.mediatek.com / filogic / uboot / c78ed66bbad3ff0f826be5c4fd548a85634dce8a / . / configs / P3041DS_SPIFLASH_defconfig
blob: 8b5e13d67eb7409adc5558bf588cc52b476cfdb0 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_PPC=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0xFFF40000
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]3CONFIG_MPC85xx=y
4CONFIG_TARGET_P3041DS=y
Hou Zhiqiangd9c6c602019-08-20 09:35:31 +0000[diff] [blame]5CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]6CONFIG_FIT=y
7CONFIG_FIT_VERBOSE=y
8CONFIG_OF_BOARD_SETUP=y
9CONFIG_OF_STDOUT_VIA_ALIAS=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]10CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]11CONFIG_BOOTDELAY=10
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]12CONFIG_BOARD_EARLY_INIT_F=y
Mario Six75b23ed2018-03-28 14:38:15 +0200[diff] [blame]13CONFIG_BOARD_EARLY_INIT_R=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]14CONFIG_HUSH_PARSER=y
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]15CONFIG_CMD_IMLS=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]16CONFIG_CMD_GREPENV=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]17CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]18CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]19CONFIG_CMD_SF=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]20CONFIG_CMD_USB=y
21CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]22CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]23CONFIG_CMD_PING=y
Siva Durga Prasad Paladugu8e45f1a2018-06-19 12:24:23 +0200[diff] [blame]24CONFIG_MP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]25CONFIG_CMD_EXT2=y
26CONFIG_CMD_FAT=y
Hou Zhiqiangd9c6c602019-08-20 09:35:31 +0000[diff] [blame]27CONFIG_OF_CONTROL=y
28CONFIG_DEFAULT_DEVICE_TREE="p3041ds"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]29CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]30CONFIG_DM=y
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]31CONFIG_FSL_CAAM=y
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]32CONFIG_FSL_ESDHC=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]33CONFIG_MTD_NOR_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]34CONFIG_FLASH_CFI_DRIVER=y
35CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
36CONFIG_SYS_FLASH_CFI=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]37CONFIG_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]38CONFIG_SF_DEFAULT_MODE=0
39CONFIG_SF_DEFAULT_SPEED=10000000
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]40CONFIG_SPI_FLASH_SPANSION=y
Alexandru Gagniucd83e98c2017-08-01 17:19:59 -0700[diff] [blame]41CONFIG_PHYLIB=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]42CONFIG_PHY_GIGE=y
Simon Glass9008a5b2015-08-19 09:33:43 -0600[diff] [blame]43CONFIG_E1000=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]44CONFIG_FMAN_ENET=y
45CONFIG_MII=y
Hou Zhiqiange4749e02019-08-27 11:04:49 +0000[diff] [blame]46CONFIG_DM_PCI=y
47CONFIG_DM_PCI_COMPAT=y
48CONFIG_PCIE_FSL=y
Tom Rinifa911f82019-05-12 07:59:12 -0400[diff] [blame]49CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]50CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]51CONFIG_SPI=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]52CONFIG_FSL_ESPI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]53CONFIG_USB=y
54CONFIG_USB_STORAGE=y