blob: 47bbb6b262394b601fa136f5ca1bad0548be623a [file] [log] [blame]
Gary Jennejohn0ec4f302008-04-28 14:04:32 +02001/*
2 * (C) Copyright 2008
3 * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Gary Jennejohn0ec4f302008-04-28 14:04:32 +02006 */
7
8#include <common.h>
9#include <config.h>
10#if defined(CONFIG_CMD_NAND)
Stefan Roesede21eab2010-09-16 14:30:37 +020011#include <asm/ppc4xx-gpio.h>
Scott Wooda59e62d2008-08-13 18:03:40 -050012#include <asm/io.h>
Gary Jennejohn0ec4f302008-04-28 14:04:32 +020013#include <nand.h>
14
15/*
16 * hardware specific access to control-lines
17 */
Scott Wooda59e62d2008-08-13 18:03:40 -050018static void quad100hd_hwcontrol(struct mtd_info *mtd,
19 int cmd, unsigned int ctrl)
Gary Jennejohn0ec4f302008-04-28 14:04:32 +020020{
Scott Wooda59e62d2008-08-13 18:03:40 -050021 struct nand_chip *this = mtd->priv;
Gary Jennejohn0ec4f302008-04-28 14:04:32 +020022
Scott Wooda59e62d2008-08-13 18:03:40 -050023 if (ctrl & NAND_CTRL_CHANGE) {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020024 gpio_write_bit(CONFIG_SYS_NAND_CLE, !!(ctrl & NAND_CLE));
25 gpio_write_bit(CONFIG_SYS_NAND_ALE, !!(ctrl & NAND_ALE));
26 gpio_write_bit(CONFIG_SYS_NAND_CE, !(ctrl & NAND_NCE));
Gary Jennejohn0ec4f302008-04-28 14:04:32 +020027 }
Scott Wooda59e62d2008-08-13 18:03:40 -050028
29 if (cmd != NAND_CMD_NONE)
30 writeb(cmd, this->IO_ADDR_W);
Gary Jennejohn0ec4f302008-04-28 14:04:32 +020031}
32
33static int quad100hd_nand_ready(struct mtd_info *mtd)
34{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020035 return gpio_read_in_bit(CONFIG_SYS_NAND_RDY);
Gary Jennejohn0ec4f302008-04-28 14:04:32 +020036}
37
38/*
39 * Main initialization routine
40 */
41int board_nand_init(struct nand_chip *nand)
42{
43 /* Set address of hardware control function */
Scott Wooda59e62d2008-08-13 18:03:40 -050044 nand->cmd_ctrl = quad100hd_hwcontrol;
Gary Jennejohn0ec4f302008-04-28 14:04:32 +020045 nand->dev_ready = quad100hd_nand_ready;
Scott Wooda59e62d2008-08-13 18:03:40 -050046 nand->ecc.mode = NAND_ECC_SOFT;
Gary Jennejohn0ec4f302008-04-28 14:04:32 +020047 /* 15 us command delay time */
48 nand->chip_delay = 20;
49
50 /* Return happy */
51 return 0;
52}
53#endif /* CONFIG_CMD_NAND */