blob: fcaba30f586b6896b472eeff5ab4b4f3e2592010 [file] [log] [blame]
Wolfgang Denkadf20a12005-09-25 01:48:28 +02001/*
2 * armboot - Startup Code for ARM926EJS CPU-core
3 *
4 * Copyright (c) 2003 Texas Instruments
5 *
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
7 *
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
Detlev Zundelf1b3f2b2009-05-13 10:54:10 +020010 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
Wolfgang Denkadf20a12005-09-25 01:48:28 +020011 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 */
32
Wolfgang Denk0191e472010-10-26 14:34:52 +020033#include <asm-offsets.h>
Wolfgang Denkadf20a12005-09-25 01:48:28 +020034#include <config.h>
35#include <version.h>
36
37/*
38 *************************************************************************
39 *
40 * Jump vector table
41 *
42 *************************************************************************
43 */
44
45.globl _start
46_start:
47 b reset
48 ldr pc, _undefined_instruction
49 ldr pc, _software_interrupt
50 ldr pc, _prefetch_abort
51 ldr pc, _data_abort
52 ldr pc, _not_used
53 ldr pc, _irq
54 ldr pc, _fiq
55
56_undefined_instruction:
57 .word undefined_instruction
58_software_interrupt:
59 .word software_interrupt
60_prefetch_abort:
61 .word prefetch_abort
62_data_abort:
63 .word data_abort
64_not_used:
65 .word not_used
66_irq:
67 .word irq
68_fiq:
69 .word fiq
70
71 .balignl 16,0xdeadbeef
72
73/*
74 *************************************************************************
75 *
76 * Startup Code (reset vector)
77 *
78 * do important init only if we don't start from memory!
79 * setup memory and board specific bits prior to relocation.
80 * relocate armboot to ram
81 * setup stack
82 *
83 *************************************************************************
84 */
85
Heiko Schocherc620af22010-09-17 13:10:51 +020086.globl _TEXT_BASE
Wolfgang Denkadf20a12005-09-25 01:48:28 +020087_TEXT_BASE:
Wolfgang Denk0708bc62010-10-07 21:51:12 +020088 .word CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */
Wolfgang Denkadf20a12005-09-25 01:48:28 +020089
Wolfgang Denkadf20a12005-09-25 01:48:28 +020090/*
91 * These are defined in the board-specific linker script.
Albert Aribaud126897e2010-11-25 22:45:02 +010092 * Subtracting _start from them lets the linker put their
93 * relative position in the executable instead of leaving
94 * them null.
Wolfgang Denkadf20a12005-09-25 01:48:28 +020095 */
Albert Aribaud126897e2010-11-25 22:45:02 +010096.globl _bss_start_ofs
97_bss_start_ofs:
98 .word __bss_start - _start
Wolfgang Denkadf20a12005-09-25 01:48:28 +020099
Albert Aribaud126897e2010-11-25 22:45:02 +0100100.globl _bss_end_ofs
101_bss_end_ofs:
102 .word _end - _start
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200103
104#ifdef CONFIG_USE_IRQ
105/* IRQ stack memory (calculated at run-time) */
106.globl IRQ_STACK_START
107IRQ_STACK_START:
108 .word 0x0badc0de
109
110/* IRQ stack memory (calculated at run-time) */
111.globl FIQ_STACK_START
112FIQ_STACK_START:
113 .word 0x0badc0de
114#endif
115
Heiko Schocherc620af22010-09-17 13:10:51 +0200116/* IRQ stack memory (calculated at run-time) + 8 bytes */
117.globl IRQ_STACK_START_IN
118IRQ_STACK_START_IN:
119 .word 0x0badc0de
120
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200121/*
122 * the actual reset code
123 */
Heiko Schocherc620af22010-09-17 13:10:51 +0200124
125reset:
126 /*
127 * set the cpu to SVC32 mode
128 */
129 mrs r0,cpsr
130 bic r0,r0,#0x1f
131 orr r0,r0,#0xd3
132 msr cpsr,r0
133
134 /*
135 * we do sys-critical inits only at reboot,
136 * not when booting from ram!
137 */
138#ifndef CONFIG_SKIP_LOWLEVEL_INIT
139 bl cpu_init_crit
140#endif
141
142/* Set stackpointer in internal RAM to call board_init_f */
143call_board_init_f:
144 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
145 ldr r0,=0x00000000
146 bl board_init_f
147
148/*------------------------------------------------------------------------------*/
149
150/*
151 * void relocate_code (addr_sp, gd, addr_moni)
152 *
153 * This "function" does not return, instead it continues in RAM
154 * after relocating the monitor code.
155 *
156 */
157 .globl relocate_code
158relocate_code:
159 mov r4, r0 /* save addr_sp */
160 mov r5, r1 /* save addr of gd */
161 mov r6, r2 /* save addr of destination */
162 mov r7, r2 /* save addr of destination */
163
164 /* Set up the stack */
165stack_setup:
166 mov sp, r4
167
168 adr r0, _start
169 ldr r2, _TEXT_BASE
Albert Aribaud126897e2010-11-25 22:45:02 +0100170 ldr r3, _bss_start_ofs
171 add r2, r0, r3 /* r2 <- source end address */
Heiko Schocherc620af22010-09-17 13:10:51 +0200172 cmp r0, r6
173 beq clear_bss
174
Heiko Schocherc620af22010-09-17 13:10:51 +0200175copy_loop:
176 ldmia r0!, {r9-r10} /* copy from source address [r0] */
177 stmia r6!, {r9-r10} /* copy to target address [r1] */
Albert Aribaud0668d162010-10-05 16:06:39 +0200178 cmp r0, r2 /* until source end address [r2] */
179 blo copy_loop
Heiko Schocherc620af22010-09-17 13:10:51 +0200180
181#ifndef CONFIG_PRELOADER
Albert Aribaud126897e2010-11-25 22:45:02 +0100182 /*
183 * fix .rel.dyn relocations
184 */
185 ldr r0, _TEXT_BASE /* r0 <- Text base */
186 sub r9, r7, r0 /* r9 <- relocation offset */
187 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
188 add r10, r10, r0 /* r10 <- sym table in FLASH */
189 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
190 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
191 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
192 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
Heiko Schocherc620af22010-09-17 13:10:51 +0200193fixloop:
Albert Aribaud126897e2010-11-25 22:45:02 +0100194 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
195 add r0, r0, r9 /* r0 <- location to fix up in RAM */
196 ldr r1, [r2, #4]
197 and r8, r1, #0xff
198 cmp r8, #23 /* relative fixup? */
199 beq fixrel
200 cmp r8, #2 /* absolute fixup? */
201 beq fixabs
202 /* ignore unknown type of fixup */
203 b fixnext
204fixabs:
205 /* absolute fix: set location to (offset) symbol value */
206 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
207 add r1, r10, r1 /* r1 <- address of symbol in table */
208 ldr r1, [r1, #4] /* r1 <- symbol value */
209 add r1, r9 /* r1 <- relocated sym addr */
210 b fixnext
211fixrel:
212 /* relative fix: increase location by offset */
213 ldr r1, [r0]
214 add r1, r1, r9
215fixnext:
216 str r1, [r0]
217 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
Heiko Schocherc620af22010-09-17 13:10:51 +0200218 cmp r2, r3
Wolfgang Denk98dd07c2010-10-23 23:22:38 +0200219 blo fixloop
Heiko Schocherc620af22010-09-17 13:10:51 +0200220#endif
Heiko Schocherc620af22010-09-17 13:10:51 +0200221
222clear_bss:
223#ifndef CONFIG_PRELOADER
Albert Aribaud126897e2010-11-25 22:45:02 +0100224 ldr r0, _bss_start_ofs
225 ldr r1, _bss_end_ofs
Heiko Schocherc620af22010-09-17 13:10:51 +0200226 ldr r3, _TEXT_BASE /* Text base */
227 mov r4, r7 /* reloc addr */
Heiko Schocherc620af22010-09-17 13:10:51 +0200228 add r0, r0, r4
Heiko Schocherc620af22010-09-17 13:10:51 +0200229 add r1, r1, r4
230 mov r2, #0x00000000 /* clear */
231
232clbss_l:str r2, [r0] /* clear loop... */
233 add r0, r0, #4
234 cmp r0, r1
235 bne clbss_l
236
237 bl coloured_LED_init
238 bl red_LED_on
239#endif
240
241/*
242 * We are done. Do not return, instead branch to second part of board
243 * initialization, now running from RAM.
244 */
Albert Aribaud126897e2010-11-25 22:45:02 +0100245#ifdef CONFIG_NAND_SPL
246 ldr r0, _nand_boot_ofs
247 mov pc, r0
248
249_nand_boot_ofs:
250 .word nand_boot
251#else
252 ldr r0, _board_init_r_ofs
253 adr r1, _start
254 add lr, r0, r1
255 add lr, lr, r9
Heiko Schocherc620af22010-09-17 13:10:51 +0200256 /* setup parameters for board_init_r */
257 mov r0, r5 /* gd_t */
258 mov r1, r7 /* dest_addr */
259 /* jump to it ... */
Heiko Schocherc620af22010-09-17 13:10:51 +0200260 mov pc, lr
261
Albert Aribaud126897e2010-11-25 22:45:02 +0100262_board_init_r_ofs:
263 .word board_init_r - _start
264#endif
265
266_rel_dyn_start_ofs:
267 .word __rel_dyn_start - _start
268_rel_dyn_end_ofs:
269 .word __rel_dyn_end - _start
270_dynsym_start_ofs:
271 .word __dynsym_start - _start
Heiko Schocherc620af22010-09-17 13:10:51 +0200272
Heiko Schocherc620af22010-09-17 13:10:51 +0200273/*
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200274 *************************************************************************
275 *
276 * CPU_init_critical registers
277 *
278 * setup important registers
279 * setup memory timing
280 *
281 *************************************************************************
282 */
283
Jean-Christophe PLAGNIOL-VILLARD314b7282009-05-15 23:45:20 +0200284#ifndef CONFIG_SKIP_LOWLEVEL_INIT
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200285cpu_init_crit:
286 /* arm_int_generic assumes the ARM boot monitor, or user software,
287 * has initialized the platform
288 */
289 mov pc, lr /* back to my caller */
Jean-Christophe PLAGNIOL-VILLARD314b7282009-05-15 23:45:20 +0200290#endif
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200291/*
292 *************************************************************************
293 *
294 * Interrupt handling
295 *
296 *************************************************************************
297 */
298
299@
300@ IRQ stack frame.
301@
302#define S_FRAME_SIZE 72
303
304#define S_OLD_R0 68
305#define S_PSR 64
306#define S_PC 60
307#define S_LR 56
308#define S_SP 52
309
310#define S_IP 48
311#define S_FP 44
312#define S_R10 40
313#define S_R9 36
314#define S_R8 32
315#define S_R7 28
316#define S_R6 24
317#define S_R5 20
318#define S_R4 16
319#define S_R3 12
320#define S_R2 8
321#define S_R1 4
322#define S_R0 0
323
324#define MODE_SVC 0x13
325#define I_BIT 0x80
326
327/*
328 * use bad_save_user_regs for abort/prefetch/undef/swi ...
329 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
330 */
331
332 .macro bad_save_user_regs
333 @ carve out a frame on current user stack
334 sub sp, sp, #S_FRAME_SIZE
335 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
336
Heiko Schocherc620af22010-09-17 13:10:51 +0200337 ldr r2, IRQ_STACK_START_IN
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200338 @ get values for "aborted" pc and cpsr (into parm regs)
339 ldmia r2, {r2 - r3}
340 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
341 add r5, sp, #S_SP
342 mov r1, lr
343 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
344 mov r0, sp @ save current stack into r0 (param register)
345 .endm
346
347 .macro irq_save_user_regs
348 sub sp, sp, #S_FRAME_SIZE
349 stmia sp, {r0 - r12} @ Calling r0-r12
350 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
351 add r8, sp, #S_PC
352 stmdb r8, {sp, lr}^ @ Calling SP, LR
353 str lr, [r8, #0] @ Save calling PC
354 mrs r6, spsr
355 str r6, [r8, #4] @ Save CPSR
356 str r0, [r8, #8] @ Save OLD_R0
357 mov r0, sp
358 .endm
359
360 .macro irq_restore_user_regs
361 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
362 mov r0, r0
363 ldr lr, [sp, #S_PC] @ Get PC
364 add sp, sp, #S_FRAME_SIZE
365 subs pc, lr, #4 @ return & move spsr_svc into cpsr
366 .endm
367
368 .macro get_bad_stack
Heiko Schocherc620af22010-09-17 13:10:51 +0200369 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200370
371 str lr, [r13] @ save caller lr in position 0 of saved stack
372 mrs lr, spsr @ get the spsr
373 str lr, [r13, #4] @ save spsr in position 1 of saved stack
374 mov r13, #MODE_SVC @ prepare SVC-Mode
375 @ msr spsr_c, r13
376 msr spsr, r13 @ switch modes, make sure moves will execute
377 mov lr, pc @ capture return pc
378 movs pc, lr @ jump to next instruction & switch modes.
379 .endm
380
381 .macro get_irq_stack @ setup IRQ stack
382 ldr sp, IRQ_STACK_START
383 .endm
384
385 .macro get_fiq_stack @ setup FIQ stack
386 ldr sp, FIQ_STACK_START
387 .endm
388
389/*
390 * exception handlers
391 */
392 .align 5
393.globl undefined_instruction
394undefined_instruction:
395 get_bad_stack
396 bad_save_user_regs
397 bl do_undefined_instruction
398
399 .align 5
400.globl software_interrupt
401software_interrupt:
402 get_bad_stack
403 bad_save_user_regs
404 bl do_software_interrupt
405
406 .align 5
407.globl prefetch_abort
408prefetch_abort:
409 get_bad_stack
410 bad_save_user_regs
411 bl do_prefetch_abort
412
413 .align 5
414.globl data_abort
415data_abort:
416 get_bad_stack
417 bad_save_user_regs
418 bl do_data_abort
419
420 .align 5
421.globl not_used
422not_used:
423 get_bad_stack
424 bad_save_user_regs
425 bl do_not_used
426
427#ifdef CONFIG_USE_IRQ
428 .align 5
429.globl irq
430irq:
431 get_irq_stack
432 irq_save_user_regs
Wolfgang Denka1be4762008-05-20 16:00:29 +0200433 bl do_irq
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200434 irq_restore_user_regs
435
436 .align 5
437.globl fiq
438fiq:
439 get_fiq_stack
440 /* someone ought to write a more effiction fiq_save_user_regs */
441 irq_save_user_regs
Wolfgang Denka1be4762008-05-20 16:00:29 +0200442 bl do_fiq
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200443 irq_restore_user_regs
444
445#else
446
447 .align 5
Wolfgang Denkc856ccc2005-09-25 02:00:47 +0200448.globl irq
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200449irq:
450 get_bad_stack
451 bad_save_user_regs
452 bl do_irq
453
454 .align 5
Wolfgang Denkc856ccc2005-09-25 02:00:47 +0200455.globl fiq
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200456fiq:
457 get_bad_stack
458 bad_save_user_regs
459 bl do_fiq
460
461#endif