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Stephen Warrena844b012014-03-25 11:39:33 -06001/*
2 * (C) Copyright 2014
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
Thierry Reding0f4c83b2014-12-09 22:25:21 -07009#include <power/as3722.h>
10
Stephen Warrenfa2a1232014-04-22 14:37:55 -060011#include <asm/arch/gpio.h>
Stephen Warrena844b012014-03-25 11:39:33 -060012#include <asm/arch/pinmux.h>
Thierry Reding0f4c83b2014-12-09 22:25:21 -070013
Stephen Warrena844b012014-03-25 11:39:33 -060014#include "pinmux-config-jetson-tk1.h"
15
Thierry Reding0f4c83b2014-12-09 22:25:21 -070016DECLARE_GLOBAL_DATA_PTR;
17
Stephen Warrena844b012014-03-25 11:39:33 -060018/*
19 * Routine: pinmux_init
20 * Description: Do individual peripheral pinmux configs
21 */
22void pinmux_init(void)
23{
Stephen Warren2516bef2015-02-18 13:27:04 -070024 pinmux_clear_tristate_input_clamping();
Stephen Warrenf16f64f2014-04-22 14:37:56 -060025
Stephen Warrenfa2a1232014-04-22 14:37:55 -060026 gpio_config_table(jetson_tk1_gpio_inits,
27 ARRAY_SIZE(jetson_tk1_gpio_inits));
28
Stephen Warrena844b012014-03-25 11:39:33 -060029 pinmux_config_pingrp_table(jetson_tk1_pingrps,
30 ARRAY_SIZE(jetson_tk1_pingrps));
31
32 pinmux_config_drvgrp_table(jetson_tk1_drvgrps,
33 ARRAY_SIZE(jetson_tk1_drvgrps));
Stephen Warren8e7c1be2016-04-21 16:03:37 -060034
35 pinmux_config_mipipadctrlgrp_table(jetson_tk1_mipipadctrlgrps,
36 ARRAY_SIZE(jetson_tk1_mipipadctrlgrps));
Stephen Warrena844b012014-03-25 11:39:33 -060037}
Thierry Reding0f4c83b2014-12-09 22:25:21 -070038
39#ifdef CONFIG_PCI_TEGRA
40int tegra_pcie_board_init(void)
41{
42 struct udevice *pmic;
43 int err;
44
45 err = as3722_init(&pmic);
46 if (err) {
47 error("failed to initialize AS3722 PMIC: %d\n", err);
48 return err;
49 }
50
51 err = as3722_sd_enable(pmic, 4);
52 if (err < 0) {
53 error("failed to enable SD4: %d\n", err);
54 return err;
55 }
56
57 err = as3722_sd_set_voltage(pmic, 4, 0x24);
58 if (err < 0) {
59 error("failed to set SD4 voltage: %d\n", err);
60 return err;
61 }
62
Thierry Reding0f4c83b2014-12-09 22:25:21 -070063 return 0;
64}
Thierry Reding0f4c83b2014-12-09 22:25:21 -070065#endif /* PCI */