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Ryan Mallon50515fa2011-06-05 07:21:22 +00001/*
2 * Bluewater Systems Snapper 9260/9G20 modules
3 *
4 * (C) Copyright 2011 Bluewater Systems
5 * Author: Andre Renaud <andre@bluewatersys.com>
6 * Author: Ryan Mallon <ryan@bluewatersys.com>
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Ryan Mallon50515fa2011-06-05 07:21:22 +00009 */
10
11#include <common.h>
Simon Glass6d20e072014-10-29 13:09:01 -060012#include <dm.h>
Ryan Mallon50515fa2011-06-05 07:21:22 +000013#include <asm/io.h>
Simon Glass6d20e072014-10-29 13:09:01 -060014#include <asm/gpio.h>
Simon Glass0ffb9d62017-05-31 19:47:48 -060015#include <asm/mach-types.h>
Ryan Mallon50515fa2011-06-05 07:21:22 +000016#include <asm/arch/at91sam9260_matrix.h>
17#include <asm/arch/at91sam9_smc.h>
18#include <asm/arch/at91_common.h>
Wenyou Yang78f89762016-02-03 10:16:50 +080019#include <asm/arch/clk.h>
Ryan Mallon50515fa2011-06-05 07:21:22 +000020#include <asm/arch/gpio.h>
Simon Glass6d20e072014-10-29 13:09:01 -060021#include <asm/arch/atmel_serial.h>
Ryan Mallon50515fa2011-06-05 07:21:22 +000022#include <net.h>
23#include <netdev.h>
24#include <i2c.h>
25#include <pca953x.h>
26
27DECLARE_GLOBAL_DATA_PTR;
28
29/* IO Expander pins */
30#define IO_EXP_ETH_RESET (0 << 1)
31#define IO_EXP_ETH_POWER (1 << 1)
32
33static void macb_hw_init(void)
34{
Ryan Mallon50515fa2011-06-05 07:21:22 +000035 struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
Ryan Mallon50515fa2011-06-05 07:21:22 +000036
Wenyou Yang78f89762016-02-03 10:16:50 +080037 at91_periph_clk_enable(ATMEL_ID_EMAC0);
Ryan Mallon50515fa2011-06-05 07:21:22 +000038
39 /* Disable pull-ups to prevent PHY going into test mode */
40 writel(pin_to_mask(AT91_PIN_PA14) |
41 pin_to_mask(AT91_PIN_PA15) |
42 pin_to_mask(AT91_PIN_PA18),
43 &pioa->pudr);
44
45 /* Power down ethernet */
46 pca953x_set_dir(0x28, IO_EXP_ETH_POWER, PCA953X_DIR_OUT);
47 pca953x_set_val(0x28, IO_EXP_ETH_POWER, 1);
48
49 /* Hold ethernet in reset */
50 pca953x_set_dir(0x28, IO_EXP_ETH_RESET, PCA953X_DIR_OUT);
51 pca953x_set_val(0x28, IO_EXP_ETH_RESET, 0);
52
53 /* Enable ethernet power */
54 pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0);
55
Heiko Schocher8a84ae12013-11-18 08:07:23 +010056 at91_phy_reset();
Ryan Mallon50515fa2011-06-05 07:21:22 +000057
58 /* Bring the ethernet out of reset */
59 pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1);
60
61 /* The phy internal reset take 21ms */
62 udelay(21 * 1000);
63
64 /* Re-enable pull-up */
65 writel(pin_to_mask(AT91_PIN_PA14) |
66 pin_to_mask(AT91_PIN_PA15) |
67 pin_to_mask(AT91_PIN_PA18),
68 &pioa->puer);
69
70 at91_macb_hw_init();
71}
72
73static void nand_hw_init(void)
74{
75 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
76 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
77 unsigned long csa;
78
79 /* Enable CS3 as NAND/SmartMedia */
80 csa = readl(&matrix->ebicsa);
81 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
82 writel(csa, &matrix->ebicsa);
83
84 /* Configure SMC CS3 for NAND/SmartMedia */
85 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
86 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
87 &smc->cs[3].setup);
88 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
89 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
90 &smc->cs[3].pulse);
91 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
92 &smc->cs[3].cycle);
93 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
94 AT91_SMC_MODE_EXNW_DISABLE |
95 AT91_SMC_MODE_DBW_8 |
96 AT91_SMC_MODE_TDF_CYCLE(3),
97 &smc->cs[3].mode);
98
99 /* Configure RDY/BSY */
Simon Glass6d20e072014-10-29 13:09:01 -0600100 gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand_rdy");
101 gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
Ryan Mallon50515fa2011-06-05 07:21:22 +0000102
103 /* Enable NandFlash */
Simon Glass6d20e072014-10-29 13:09:01 -0600104 gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand_ce");
105 gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
Ryan Mallon50515fa2011-06-05 07:21:22 +0000106}
107
108int board_init(void)
109{
Wenyou Yang78f89762016-02-03 10:16:50 +0800110 at91_periph_clk_enable(ATMEL_ID_PIOA);
111 at91_periph_clk_enable(ATMEL_ID_PIOB);
112 at91_periph_clk_enable(ATMEL_ID_PIOC);
Ryan Mallon50515fa2011-06-05 07:21:22 +0000113
114 /* The mach-type is the same for both Snapper 9260 and 9G20 */
115 gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260;
116
117 /* Address of boot parameters */
118 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
119
120 /* Initialise peripherals */
121 at91_seriald_hw_init();
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100122 i2c_set_bus_num(0);
Ryan Mallon50515fa2011-06-05 07:21:22 +0000123 nand_hw_init();
124 macb_hw_init();
125
126 return 0;
127}
128
129int board_eth_init(bd_t *bis)
130{
131 return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x1f);
132}
133
134int dram_init(void)
135{
136 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
137 CONFIG_SYS_SDRAM_SIZE);
138 return 0;
139}
140
141void reset_phy(void)
142{
143}
Simon Glass6d20e072014-10-29 13:09:01 -0600144
145static struct atmel_serial_platdata at91sam9260_serial_plat = {
146 .base_addr = ATMEL_BASE_DBGU,
147};
148
149U_BOOT_DEVICE(at91sam9260_serial) = {
150 .name = "serial_atmel",
151 .platdata = &at91sam9260_serial_plat,
152};