| Tom Warren | c47e717 | 2013-01-28 13:32:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. |
| 3 | * |
| Tom Rini | e237880 | 2016-01-14 22:05:13 -0500 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0 |
| Tom Warren | c47e717 | 2013-01-28 13:32:07 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | /* Tegra114 clock control functions */ |
| 8 | |
| 9 | #ifndef _TEGRA114_CLOCK_H_ |
| 10 | #define _TEGRA114_CLOCK_H_ |
| 11 | |
| 12 | #include <asm/arch-tegra/clock.h> |
| 13 | |
| 14 | /* CLK_RST_CONTROLLER_OSC_CTRL_0 */ |
| 15 | #define OSC_FREQ_SHIFT 28 |
| 16 | #define OSC_FREQ_MASK (0xF << OSC_FREQ_SHIFT) |
| 17 | |
| Thierry Reding | 0fca329 | 2015-09-08 11:38:04 +0200 | [diff] [blame] | 18 | /* CLK_RST_CONTROLLER_PLLC_MISC_0 */ |
| 19 | #define PLLC_IDDQ (1 << 26) |
| 20 | |
| Tom Warren | c47e717 | 2013-01-28 13:32:07 +0000 | [diff] [blame] | 21 | #endif /* _TEGRA114_CLOCK_H_ */ |