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git01.mediatek.com / filogic / uboot / c6eb9e76bd459c777b41bc9b699fd9ac9366cd3b / . / arch / arm / mach-exynos / include / mach / pwm.h
blob: 417fc15551d5863a9b54deb566fffeef3a22f66f [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Minkyu Kangb1b24682011-01-24 15:22:23 +0900[diff] [blame]2/*
3 * Copyright (C) 2009 Samsung Electronics
4 * Kyungmin Park <kyungmin.park@samsung.com>
5 * Minkyu Kang <mk7.kang@samsung.com>
Minkyu Kangb1b24682011-01-24 15:22:23 +0900[diff] [blame]6 */
7
8#ifndef __ASM_ARM_ARCH_PWM_H_
9#define __ASM_ARM_ARCH_PWM_H_
10
Donghwa Lee85f5df22011-03-07 21:11:42 +0000[diff] [blame]11#define PRESCALER_0 (8 - 1) /* prescaler of timer 0, 1 */
12#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */
13
14/* Divider MUX */
15#define MUX_DIV_1 0 /* 1/1 period */
16#define MUX_DIV_2 1 /* 1/2 period */
17#define MUX_DIV_4 2 /* 1/4 period */
18#define MUX_DIV_8 3 /* 1/8 period */
19#define MUX_DIV_16 4 /* 1/16 period */
20
21#define MUX_DIV_SHIFT(x) (x * 4)
22
Donghwa Lee85f5df22011-03-07 21:11:42 +0000[diff] [blame]23#define TCON_OFFSET(x) ((x + 1) * (!!x) << 2)
24
25#define TCON_START(x) (1 << TCON_OFFSET(x))
26#define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1))
27#define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2))
28#define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3))
Minkyu Kangda0bff82011-03-10 20:05:58 +0900[diff] [blame]29#define TCON4_AUTO_RELOAD (1 << 22)
Donghwa Lee85f5df22011-03-07 21:11:42 +0000[diff] [blame]30
Minkyu Kangb1b24682011-01-24 15:22:23 +0900[diff] [blame]31#ifndef __ASSEMBLY__
32struct s5p_timer {
33 unsigned int tcfg0;
34 unsigned int tcfg1;
35 unsigned int tcon;
36 unsigned int tcntb0;
37 unsigned int tcmpb0;
38 unsigned int tcnto0;
39 unsigned int tcntb1;
40 unsigned int tcmpb1;
41 unsigned int tcnto1;
42 unsigned int tcntb2;
43 unsigned int tcmpb2;
44 unsigned int tcnto2;
45 unsigned int tcntb3;
Chander Kashyap9d599cb2011-12-18 22:56:43 +0000[diff] [blame]46 unsigned int tcmpb3;
Minkyu Kangb1b24682011-01-24 15:22:23 +0900[diff] [blame]47 unsigned int tcnto3;
48 unsigned int tcntb4;
49 unsigned int tcnto4;
50 unsigned int tintcstat;
51};
52#endif /* __ASSEMBLY__ */
53
54#endif