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git01.mediatek.com / filogic / uboot / c6eb9e76bd459c777b41bc9b699fd9ac9366cd3b / . / arch / arm / dts / rk3399-leez-p710.dts
blob: 32baa57b94819912d8ac554eed9eac9e0789162a [file] [log] [blame]
Andy Yan0cc7fbd2019-09-22 18:06:56 +0800[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Andy Yan <andy.yan@gmail.com>
4 */
5
6/dts-v1/;
7#include <dt-bindings/input/linux-event-codes.h>
8#include <dt-bindings/pwm/pwm.h>
9#include "rk3399.dtsi"
10#include "rk3399-opp.dtsi"
11
12/ {
13 model = "Leez RK3399 P710";
14 compatible = "leez,p710", "rockchip,rk3399";
15
16 chosen {
17 stdout-path = "serial2:1500000n8";
18 };
19
20 clkin_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
23 clock-output-names = "clkin_gmac";
24 #clock-cells = <0>;
25 };
26
27 sdio_pwrseq: sdio-pwrseq {
28 compatible = "mmc-pwrseq-simple";
29 clocks = <&rk808 1>;
30 clock-names = "ext_clock";
31 pinctrl-names = "default";
32 pinctrl-0 = <&wifi_reg_on_h>;
33 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
34 };
35
36 dc5v_adp: dc5v-adp {
37 compatible = "regulator-fixed";
38 regulator-name = "dc5v_adapter";
39 regulator-always-on;
40 regulator-boot-on;
41 regulator-min-microvolt = <5000000>;
42 regulator-max-microvolt = <5000000>;
43 };
44
45 vcc5v0_sys: vcc5v0-sys {
46 compatible = "regulator-fixed";
47 regulator-name = "vcc5v0_sys";
48 regulator-always-on;
49 regulator-boot-on;
50 regulator-min-microvolt = <5000000>;
51 regulator-max-microvolt = <5000000>;
52 vin-supply = <&dc5v_adp>;
53 };
54
55 vcc3v3_sys: vcc3v3-sys {
56 compatible = "regulator-fixed";
57 regulator-name = "vcc3v3_sys";
58 regulator-always-on;
59 regulator-boot-on;
60 regulator-min-microvolt = <3300000>;
61 regulator-max-microvolt = <3300000>;
62 vin-supply = <&vcc5v0_sys>;
63 };
64
65 vcc5v0_host0: vcc5v0_host1: vcc5v0-host {
66 compatible = "regulator-fixed";
67 regulator-name = "vcc5v0_host";
68 regulator-boot-on;
69 regulator-always-on;
70 regulator-min-microvolt = <5500000>;
71 regulator-max-microvolt = <5500000>;
72 vin-supply = <&vcc5v0_sys>;
73 };
74
75 vcc5v0_host3: vcc5v0-host3 {
76 compatible = "regulator-fixed";
77 regulator-name = "vcc5v0_host3";
78 enable-active-high;
79 gpio = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>;
80 pinctrl-names = "default";
81 pinctrl-0 = <&vcc5v0_host3_en>;
82 regulator-always-on;
83 vin-supply = <&vcc5v0_sys>;
84 };
85
86 vcc3v3_lan: vcc3v3-lan {
87 compatible = "regulator-fixed";
88 regulator-name = "vcc3v3_lan";
89 regulator-always-on;
90 regulator-boot-on;
91 regulator-min-microvolt = <3300000>;
92 regulator-max-microvolt = <3300000>;
93 vim-supply = <&vcc3v3_sys>;
94 };
95
96 vdd_log: vdd-log {
97 compatible = "pwm-regulator";
98 pwms = <&pwm2 0 25000 1>;
99 regulator-name = "vdd_log";
100 regulator-always-on;
101 regulator-boot-on;
102 regulator-min-microvolt = <800000>;
103 regulator-max-microvolt = <1400000>;
104 vin-supply = <&vcc5v0_sys>;
105 };
106};
107
108&cpu_l0 {
109 cpu-supply = <&vdd_cpu_l>;
110};
111
112&cpu_l1 {
113 cpu-supply = <&vdd_cpu_l>;
114};
115
116&cpu_l2 {
117 cpu-supply = <&vdd_cpu_l>;
118};
119
120&cpu_l3 {
121 cpu-supply = <&vdd_cpu_l>;
122};
123
124&cpu_b0 {
125 cpu-supply = <&vdd_cpu_b>;
126};
127
128&cpu_b1 {
129 cpu-supply = <&vdd_cpu_b>;
130};
131
132&emmc_phy {
133 status = "okay";
134};
135
136&gmac {
137 assigned-clocks = <&cru SCLK_RMII_SRC>;
138 assigned-clock-parents = <&clkin_gmac>;
139 clock_in_out = "input";
140 phy-supply = <&vcc3v3_lan>;
141 phy-mode = "rgmii";
142 pinctrl-names = "default";
143 pinctrl-0 = <&rgmii_pins>;
144 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
145 snps,reset-active-low;
146 snps,reset-delays-us = <0 10000 50000>;
147 tx_delay = <0x28>;
148 rx_delay = <0x11>;
149 status = "okay";
150};
151
152&gpu {
153 mali-supply = <&vdd_gpu>;
154 status = "okay";
155};
156
157&hdmi {
158 ddc-i2c-bus = <&i2c7>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&hdmi_cec>;
161 status = "okay";
162};
163
164&hdmi_sound {
165 status = "okay";
166};
167
168&i2c0 {
169 clock-frequency = <400000>;
170 i2c-scl-rising-time-ns = <168>;
171 i2c-scl-falling-time-ns = <4>;
172 status = "okay";
173
174 rk808: pmic@1b {
175 compatible = "rockchip,rk808";
176 reg = <0x1b>;
177 interrupt-parent = <&gpio1>;
178 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
179 #clock-cells = <1>;
180 clock-output-names = "xin32k", "rk808-clkout2";
181 pinctrl-names = "default";
182 pinctrl-0 = <&pmic_int_l>;
183 rockchip,system-power-controller;
184 wakeup-source;
185
186 vcc1-supply = <&vcc5v0_sys>;
187 vcc2-supply = <&vcc5v0_sys>;
188 vcc3-supply = <&vcc5v0_sys>;
189 vcc4-supply = <&vcc5v0_sys>;
190 vcc6-supply = <&vcc5v0_sys>;
191 vcc7-supply = <&vcc5v0_sys>;
192 vcc8-supply = <&vcc3v3_sys>;
193 vcc9-supply = <&vcc5v0_sys>;
194 vcc10-supply = <&vcc5v0_sys>;
195 vcc11-supply = <&vcc5v0_sys>;
196 vcc12-supply = <&vcc3v3_sys>;
197 vddio-supply = <&vcc_1v8>;
198
199 regulators {
200 vdd_center: DCDC_REG1 {
201 regulator-name = "vdd_center";
202 regulator-always-on;
203 regulator-boot-on;
204 regulator-min-microvolt = <750000>;
205 regulator-max-microvolt = <1350000>;
206 regulator-ramp-delay = <6001>;
207 regulator-state-mem {
208 regulator-off-in-suspend;
209 };
210 };
211
212 vdd_cpu_l: DCDC_REG2 {
213 regulator-name = "vdd_cpu_l";
214 regulator-always-on;
215 regulator-boot-on;
216 regulator-min-microvolt = <750000>;
217 regulator-max-microvolt = <1350000>;
218 regulator-ramp-delay = <6001>;
219 regulator-state-mem {
220 regulator-off-in-suspend;
221 };
222 };
223
224 vcc_ddr: DCDC_REG3 {
225 regulator-name = "vcc_ddr";
226 regulator-always-on;
227 regulator-boot-on;
228 regulator-state-mem {
229 regulator-on-in-suspend;
230 };
231 };
232
233 vcc_1v8: DCDC_REG4 {
234 regulator-name = "vcc_1v8";
235 regulator-always-on;
236 regulator-boot-on;
237 regulator-min-microvolt = <1800000>;
238 regulator-max-microvolt = <1800000>;
239 regulator-state-mem {
240 regulator-on-in-suspend;
241 regulator-suspend-microvolt = <1800000>;
242 };
243 };
244
245 vcc1v8_dvp: LDO_REG1 {
246 regulator-name = "vcc1v8_dvp";
247 regulator-always-on;
248 regulator-boot-on;
249 regulator-min-microvolt = <1800000>;
250 regulator-max-microvolt = <1800000>;
251 regulator-state-mem {
252 regulator-off-in-suspend;
253 };
254 };
255
256 vcc1v8_hdmi: LDO_REG2 {
257 regulator-name = "vcc1v8_hdmi";
258 regulator-always-on;
259 regulator-boot-on;
260 regulator-min-microvolt = <1800000>;
261 regulator-max-microvolt = <1800000>;
262 regulator-state-mem {
263 regulator-off-in-suspend;
264 };
265 };
266
267 vcca_1v8: LDO_REG3 {
268 regulator-name = "vcca_1v8";
269 regulator-always-on;
270 regulator-boot-on;
271 regulator-min-microvolt = <1800000>;
272 regulator-max-microvolt = <1800000>;
273 regulator-state-mem {
274 regulator-on-in-suspend;
275 regulator-suspend-microvolt = <1800000>;
276 };
277 };
278
279 vccio_sd: LDO_REG4 {
280 regulator-name = "vccio_sd";
281 regulator-always-on;
282 regulator-boot-on;
283 regulator-min-microvolt = <3000000>;
284 regulator-max-microvolt = <3000000>;
285 regulator-state-mem {
286 regulator-on-in-suspend;
287 regulator-suspend-microvolt = <3000000>;
288 };
289 };
290
291 vcca3v0_codec: LDO_REG5 {
292 regulator-name = "vcca3v0_codec";
293 regulator-always-on;
294 regulator-boot-on;
295 regulator-min-microvolt = <3000000>;
296 regulator-max-microvolt = <3000000>;
297 regulator-state-mem {
298 regulator-off-in-suspend;
299 };
300 };
301
302 vcc_1v5: LDO_REG6 {
303 regulator-name = "vcc_1v5";
304 regulator-always-on;
305 regulator-boot-on;
306 regulator-min-microvolt = <1500000>;
307 regulator-max-microvolt = <1500000>;
308 regulator-state-mem {
309 regulator-on-in-suspend;
310 regulator-suspend-microvolt = <1500000>;
311 };
312 };
313
314 vcc0v9_hdmi: LDO_REG7 {
315 regulator-name = "vcc0v9_hdmi";
316 regulator-always-on;
317 regulator-boot-on;
318 regulator-min-microvolt = <900000>;
319 regulator-max-microvolt = <900000>;
320 regulator-state-mem {
321 regulator-off-in-suspend;
322 };
323 };
324
325 vcc_3v0: LDO_REG8 {
326 regulator-name = "vcc_3v0";
327 regulator-always-on;
328 regulator-boot-on;
329 regulator-min-microvolt = <3000000>;
330 regulator-max-microvolt = <3000000>;
331 regulator-state-mem {
332 regulator-on-in-suspend;
333 regulator-suspend-microvolt = <3000000>;
334 };
335 };
336 };
337 };
338
339 vdd_cpu_b: regulator@40 {
340 compatible = "silergy,syr827";
341 reg = <0x40>;
342 fcs,suspend-voltage-selector = <1>;
343 pinctrl-names = "default";
344 pinctrl-0 = <&vsel1_gpio>;
345 regulator-name = "vdd_cpu_b";
346 regulator-min-microvolt = <712500>;
347 regulator-max-microvolt = <1500000>;
348 regulator-ramp-delay = <1000>;
349 regulator-always-on;
350 regulator-boot-on;
351 vin-supply = <&vcc5v0_sys>;
352
353 regulator-state-mem {
354 regulator-off-in-suspend;
355 };
356 };
357
358 vdd_gpu: regulator@41 {
359 compatible = "silergy,syr828";
360 reg = <0x41>;
361 fcs,suspend-voltage-selector = <1>;
362 pinctrl-names = "default";
363 pinctrl-0 = <&vsel2_gpio>;
364 regulator-name = "vdd_gpu";
365 regulator-min-microvolt = <712500>;
366 regulator-max-microvolt = <1500000>;
367 regulator-ramp-delay = <1000>;
368 regulator-always-on;
369 regulator-boot-on;
370 vin-supply = <&vcc5v0_sys>;
371
372 regulator-state-mem {
373 regulator-off-in-suspend;
374 };
375 };
376};
377
378&i2c1 {
379 i2c-scl-rising-time-ns = <300>;
380 i2c-scl-falling-time-ns = <15>;
381 status = "okay";
382};
383
384&i2c3 {
385 i2c-scl-rising-time-ns = <450>;
386 i2c-scl-falling-time-ns = <15>;
387 status = "okay";
388};
389
390&i2c4 {
391 i2c-scl-rising-time-ns = <600>;
392 i2c-scl-falling-time-ns = <20>;
393 status = "okay";
394};
395
396&i2c7 {
397 status = "okay";
398};
399
400&i2s0 {
401 rockchip,playback-channels = <8>;
402 rockchip,capture-channels = <8>;
403 status = "okay";
404};
405
406&i2s1 {
407 rockchip,playback-channels = <2>;
408 rockchip,capture-channels = <2>;
409 status = "okay";
410};
411
412&i2s2 {
413 status = "okay";
414};
415
416&io_domains {
417 status = "okay";
418
419 bt656-supply = <&vcc1v8_dvp>;
420 audio-supply = <&vcc_1v8>;
421 sdmmc-supply = <&vccio_sd>;
422 gpio1830-supply = <&vcc_3v0>;
423};
424
425&pmu_io_domains {
426 status = "okay";
427 pmu1830-supply = <&vcc_3v0>;
428};
429
430&pinctrl {
431 bt {
432 bt_reg_on_h: bt-reg-on-h {
433 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
434 };
435
436 bt_host_wake_l: bt-host-wake-l {
437 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
438 };
439
440 bt_wake_l: bt-wake-l {
441 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
442 };
443 };
444
445 pmic {
446 pmic_int_l: pmic-int-l {
447 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
448 };
449
450 vsel1_gpio: vsel1-gpio {
451 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
452 };
453
454 vsel2_gpio: vsel2-gpio {
455 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
456 };
457 };
458
459 usb2 {
460 vcc5v0_host3_en: vcc5v0-host3-en {
461 rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
462 };
463 };
464
465 wifi {
466 wifi_reg_on_h: wifi-reg-on-h {
467 rockchip,pins =
468 <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
469 };
470
471 wifi_host_wake_l: wifi-host-wake-l {
472 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
473 };
474 };
475};
476
477&pwm2 {
478 status = "okay";
479};
480
481&saradc {
482 status = "okay";
483
484 vref-supply = <&vcc_1v8>;
485};
486
487&sdio0 {
488 #address-cells = <1>;
489 #size-cells = <0>;
490 bus-width = <4>;
491 clock-frequency = <50000000>;
492 cap-sdio-irq;
493 cap-sd-highspeed;
494 keep-power-in-suspend;
495 mmc-pwrseq = <&sdio_pwrseq>;
496 non-removable;
497 pinctrl-names = "default";
498 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
499 sd-uhs-sdr104;
500 status = "okay";
501
502 brcmf: wifi@1 {
503 compatible = "brcm,bcm4329-fmac";
504 reg = <1>;
505 interrupt-parent = <&gpio0>;
506 interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
507 interrupt-names = "host-wake";
508 pinctrl-names = "default";
509 pinctrl-0 = <&wifi_host_wake_l>;
510 };
511};
512
513&sdmmc {
514 bus-width = <4>;
515 cap-mmc-highspeed;
516 cap-sd-highspeed;
517 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
518 disable-wp;
519 max-frequency = <150000000>;
520 pinctrl-names = "default";
521 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
522 status = "okay";
523};
524
525&sdhci {
526 bus-width = <8>;
527 mmc-hs400-1_8v;
528 mmc-hs400-enhanced-strobe;
529 non-removable;
530 status = "okay";
531};
532
533&tcphy0 {
534 status = "okay";
535};
536
537&tcphy1 {
538 status = "okay";
539};
540
541&tsadc {
542 status = "okay";
543
544 /* tshut mode 0:CRU 1:GPIO */
545 rockchip,hw-tshut-mode = <1>;
546 /* tshut polarity 0:LOW 1:HIGH */
547 rockchip,hw-tshut-polarity = <1>;
548};
549
550&u2phy0 {
551 status = "okay";
552
553 u2phy0_otg: otg-port {
554 status = "okay";
555 };
556
557 u2phy0_host: host-port {
558 phy-supply = <&vcc5v0_host0>;
559 status = "okay";
560 };
561};
562
563&u2phy1 {
564 status = "okay";
565
566 u2phy1_otg: otg-port {
567 status = "okay";
568 };
569
570 u2phy1_host: host-port {
571 phy-supply = <&vcc5v0_host1>;
572 status = "okay";
573 };
574};
575
576&uart0 {
577 pinctrl-names = "default";
578 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
579 status = "okay";
580
581 bluetooth {
582 compatible = "brcm,bcm43438-bt";
583 clocks = <&rk808 1>;
584 clock-names = "ext_clock";
585 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
586 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
587 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
588 pinctrl-names = "default";
589 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_reg_on_h>;
590 };
591};
592
593&uart2 {
594 status = "okay";
595};
596
597&usb_host0_ehci {
598 status = "okay";
599};
600
601&usb_host0_ohci {
602 status = "okay";
603};
604
605&usb_host1_ehci {
606 status = "okay";
607};
608
609&usb_host1_ohci {
610 status = "okay";
611};
612
613&usbdrd3_0 {
614 status = "okay";
615};
616
617&usbdrd_dwc3_0 {
618 status = "okay";
619 dr_mode = "otg";
620};
621
622&usbdrd3_1 {
623 status = "okay";
624};
625
626&usbdrd_dwc3_1 {
627 status = "okay";
628 dr_mode = "host";
629};
630
631&vopb {
632 status = "okay";
633};
634
635&vopb_mmu {
636 status = "okay";
637};
638
639&vopl {
640 status = "okay";
641};
642
643&vopl_mmu {
644 status = "okay";
645};