blob: f9c7c23cd9ab8deda49eb34f5f394b66063612cc [file] [log] [blame]
Joseph Chen72cd8792021-06-02 15:58:25 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2021 Rockchip Electronics Co., Ltd
4 */
5
6#ifndef __CONFIG_RK3568_COMMON_H
7#define __CONFIG_RK3568_COMMON_H
8
9#include "rockchip-common.h"
10
Joseph Chen72cd8792021-06-02 15:58:25 +080011#define CONFIG_IRAM_BASE 0xfdcc0000
12
Joseph Chen72cd8792021-06-02 15:58:25 +080013#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
14
15#define CONFIG_SYS_SDRAM_BASE 0
16#define SDRAM_MAX_SIZE 0xf0000000
17
18#ifndef CONFIG_SPL_BUILD
19#define ENV_MEM_LAYOUT_SETTINGS \
20 "scriptaddr=0x00c00000\0" \
21 "pxefile_addr_r=0x00e00000\0" \
22 "fdt_addr_r=0x0a100000\0" \
23 "kernel_addr_r=0x02080000\0" \
24 "ramdisk_addr_r=0x0a200000\0"
25
26#include <config_distro_bootcmd.h>
27#define CONFIG_EXTRA_ENV_SETTINGS \
28 ENV_MEM_LAYOUT_SETTINGS \
29 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
30 "partitions=" PARTS_DEFAULT \
31 ROCKCHIP_DEVICE_SETTINGS \
32 BOOTENV
33#endif
34
35#endif