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git01.mediatek.com / filogic / uboot / c6cb99bbea55781ba8e4b1228146c2a4ed1195ea / . / include / configs / db-88f6720.h
blob: 7357f9800fdf501a2f1458b83a879ff92e273b81 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]2/*
3 * Copyright (C) 2016 Stefan Roese <sr@denx.de>
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]4 */
5
6#ifndef _CONFIG_DB_88F6720_H
7#define _CONFIG_DB_88F6720_H
8
9/*
10 * High Level Configuration Options (easy to change)
11 */
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]12
13/*
14 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
15 * for DDR ECC byte filling in the SPL before loading the main
16 * U-Boot into it.
17 */
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]18
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]19/* I2C */
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]20#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]21
22/* USB/EHCI configuration */
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]23#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
24
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]25/* Environment in SPI NOR flash */
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]26
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]27#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
28
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]29/*
30 * mv-common.h should be defined after CMD configs since it used them
31 * to enable certain macros
32 */
33#include "mv-common.h"
34
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]35/* SPL */
36/* Defines for SPL */
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]37
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]38#endif /* _CONFIG_DB_88F6720_H */