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Mario Six8ea19da2018-09-27 09:19:30 +02001* Guntermann & Drunck Integrated Hardware Systems OSD
2
3Required properties:
4- compatible: "gdsys,ihs_video_out"
5- reg: A combination of three register spaces:
6 - Register base for the video registers
7 - Register base for the OSD registers
8 - Address of the OSD video memory
9- mode: The initial resolution and frequency: "1024_768_60", "720_400_70", or
10 "640_480_70"
11- clk_gen: phandle to the pixel clock generator
12- dp_tx: phandle to the display associated with the OSD
13
14Example:
15
16fpga0_video0 {
17 compatible = "gdsys,ihs_video_out";
18 reg = <0x100 0x40
19 0x180 0x20
20 0x1000 0x1000>;
21 dp_tx = <&fpga0_dp_video0>;
22 clk_gen = <&fpga0_video0_clkgen>;
23};