blob: d0495ce2486a9eba507b69be824792be8f8c00b8 [file] [log] [blame]
Lukas Auer396f0bd2019-08-21 21:14:45 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Based on arch/riscv/cpu/u-boot.lds, which is
4 * Copyright (C) 2017 Andes Technology Corporation
5 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
6 *
7 * and arch/mips/cpu/u-boot-spl.lds.
8 */
9MEMORY { .spl_mem : ORIGIN = IMAGE_TEXT_BASE, LENGTH = IMAGE_MAX_SIZE }
10MEMORY { .bss_mem : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
11 LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
12
13OUTPUT_ARCH("riscv")
14ENTRY(_start)
15
16SECTIONS
17{
18 . = ALIGN(4);
19 .text : {
20 arch/riscv/cpu/start.o (.text)
21 *(.text*)
22 } > .spl_mem
23
24 . = ALIGN(4);
25 .rodata : {
26 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
27 } > .spl_mem
28
29 . = ALIGN(4);
30 .data : {
31 *(.data*)
32 } > .spl_mem
33 . = ALIGN(4);
34
35 .got : {
36 __got_start = .;
37 *(.got.plt) *(.got)
38 __got_end = .;
39 } > .spl_mem
40
41 . = ALIGN(4);
42
43 .u_boot_list : {
44 KEEP(*(SORT(.u_boot_list*)));
45 } > .spl_mem
46
47 . = ALIGN(4);
48
49 .binman_sym_table : {
50 __binman_sym_start = .;
51 KEEP(*(SORT(.binman_sym*)));
52 __binman_sym_end = .;
53 } > .spl_mem
54
55 . = ALIGN(4);
56
57 /DISCARD/ : { *(.rela.plt*) }
58 .rela.dyn : {
59 __rel_dyn_start = .;
60 *(.rela*)
61 __rel_dyn_end = .;
62 } > .spl_mem
63
64 . = ALIGN(4);
65
66 .dynsym : {
67 __dyn_sym_start = .;
68 *(.dynsym)
69 __dyn_sym_end = .;
70 } > .spl_mem
71
72 . = ALIGN(4);
73
74 _end = .;
Pragnesh Patel45b4ad9d2020-05-29 11:33:23 +053075 _image_binary_end = .;
Lukas Auer396f0bd2019-08-21 21:14:45 +020076
77 .bss : {
78 __bss_start = .;
79 *(.bss*)
Rick Chen55bc1bd2019-11-14 13:52:27 +080080 . = ALIGN(8);
Lukas Auer396f0bd2019-08-21 21:14:45 +020081 __bss_end = .;
82 } > .bss_mem
83}