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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -05002/*
Kumar Galae727a362011-01-12 02:48:53 -06003 * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -05004 */
5
Masahiro Yamadacd1b58e2014-04-28 10:17:10 +09006#include "config.h"
Kumar Galae727a362011-01-12 02:48:53 -06007
8#ifdef CONFIG_RESET_VECTOR_ADDRESS
9#define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS
10#else
Kumar Gala6472af82009-09-09 11:40:41 -050011#define RESET_VECTOR_ADDRESS 0xfffffffc
12#endif
13
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050014OUTPUT_ARCH(powerpc)
Pali Rohár3f9f1bd2022-04-03 00:05:09 +020015ENTRY(_start)
Peter Tyser1047c162010-09-29 14:05:56 -050016
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050017PHDRS
18{
19 text PT_LOAD;
20 bss PT_LOAD;
21}
22
23SECTIONS
24{
25 /* Read-only sections, merged into text segment: */
Pali Rohárd61e3c22022-04-05 15:12:35 +020026#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
27 .bootpg CONFIG_SYS_TEXT_BASE - 0x1000 :
28 {
29 KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
30 } :text = 0xffff
31 . = CONFIG_SYS_TEXT_BASE;
32#endif
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050033 .text :
34 {
Peter Tyser1047c162010-09-29 14:05:56 -050035 *(.text*)
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050036 } :text
37 _etext = .;
38 PROVIDE (etext = .);
39 .rodata :
40 {
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050041 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
42 } :text
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050043
44 /* Read-write section, merged into data segment: */
45 . = (. + 0x00FF) & 0xFFFFFF00;
46 _erotext = .;
47 PROVIDE (erotext = .);
48 .reloc :
49 {
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050050 _GOT2_TABLE_ = .;
Peter Tyser1047c162010-09-29 14:05:56 -050051 KEEP(*(.got2))
Joakim Tjernlund42126a62010-12-03 17:30:37 +010052 KEEP(*(.got))
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050053 _FIXUP_TABLE_ = .;
Peter Tyser1047c162010-09-29 14:05:56 -050054 KEEP(*(.fixup))
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050055 }
Joakim Tjernlund42126a62010-12-03 17:30:37 +010056 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050057 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
58
59 .data :
60 {
Peter Tyser1047c162010-09-29 14:05:56 -050061 *(.data*)
62 *(.sdata*)
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050063 }
64 _edata = .;
65 PROVIDE (edata = .);
66
67 . = .;
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050068
Marek Vasut607092a2012-10-12 10:27:03 +000069 . = ALIGN(4);
70 .u_boot_list : {
Albert ARIBAUDc24895e2013-02-25 00:59:00 +000071 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut607092a2012-10-12 10:27:03 +000072 }
73
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050074 . = .;
75 __start___ex_table = .;
76 __ex_table : { *(__ex_table) }
77 __stop___ex_table = .;
78
Pali Rohár0486cb62022-04-05 15:12:30 +020079 . = ALIGN(4);
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050080 __init_begin = .;
81 .text.init : { *(.text.init) }
82 .data.init : { *(.data.init) }
Pali Rohár0486cb62022-04-05 15:12:30 +020083 . = ALIGN(4);
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050084 __init_end = .;
Jagdish Gediya910e1ae2018-09-03 21:35:05 +053085 _end = .;
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050086
Pali Rohárd61e3c22022-04-05 15:12:35 +020087#ifndef CONFIG_SYS_MPC85XX_NO_RESETVEC
Kumar Gala6472af82009-09-09 11:40:41 -050088 .bootpg RESET_VECTOR_ADDRESS - 0xffc :
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050089 {
Stefan Roese88fbf932010-04-15 16:07:28 +020090 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050091 } :text = 0xffff
92
Kumar Gala6472af82009-09-09 11:40:41 -050093 .resetvec RESET_VECTOR_ADDRESS :
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050094 {
Peter Tyser1047c162010-09-29 14:05:56 -050095 KEEP(*(.resetvec))
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050096 } :text = 0xffff
97
Kumar Gala6472af82009-09-09 11:40:41 -050098 . = RESET_VECTOR_ADDRESS + 0x4;
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -050099
Peter Tyser430445f2009-10-07 11:45:00 -0500100 /*
101 * Make sure that the bss segment isn't linked at 0x0, otherwise its
102 * address won't be updated during relocation fixups. Note that
103 * this is a temporary fix. Code to dynamically the fixup the bss
104 * location will be added in the future. When the bss relocation
105 * fixup code is present this workaround should be removed.
106 */
107#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
108 . |= 0x10;
109#endif
Ying Zhang0d4f5442013-05-20 14:07:23 +0800110#endif
Peter Tyser430445f2009-10-07 11:45:00 -0500111
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -0500112 __bss_start = .;
113 .bss (NOLOAD) :
114 {
Peter Tyser1047c162010-09-29 14:05:56 -0500115 *(.sbss*)
116 *(.bss*)
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -0500117 *(COMMON)
118 } :bss
119
120 . = ALIGN(4);
Simon Glassed70c8f2013-03-14 06:54:53 +0000121 __bss_end = . ;
Srikanth Srinivasan949a2d52009-04-03 15:36:13 -0500122 PROVIDE (end = .);
123}