blob: c06a6aeb023dee63bb1127a3bdc2b6033bf8bbfa [file] [log] [blame]
Matthias Fuchs1df4d252009-07-22 13:56:21 +02001/*
2 * (C) Copyright 2008-2009
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Matthias Fuchs1df4d252009-07-22 13:56:21 +02006 */
7
8#include <common.h>
9#include <asm/ppc4xx_config.h>
10
11struct ppc4xx_config ppc4xx_config_val[] = {
12 {
13 "133",
14 "CPU: 133 PLB: 133 OPB: 66 EBC: 44 PCI: 44/66",
15 {
16 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
17 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
18 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
19 0x00, 0x40, 0x12, 0x12, 0x42, 0x3e, 0x00, 0x00
20 }
21 },
22 {
23 "266",
24 "CPU: 266 PLB: 133 OPB: 66 EBC: 44 PCI: 44/66",
25 {
26 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
27 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
28 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
29 0x00, 0x50, 0x22, 0x2d, 0x42, 0x3e, 0x00, 0x00
30 }
31 },
32 {
33 "333",
34 "CPU: 333 PLB: 111 OPB: 55 EBC: 55 PCI: 55/111",
35 {
36 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
37 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
38 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
39 0x00, 0x60, 0x29, 0x2d, 0x42, 0xbe, 0x00, 0x00
40 }
41 },
42};
43
44int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);