Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 1 | /* Initializes CPU and basic hardware such as memory |
| 2 | * controllers, IRQ controller and system timer 0. |
| 3 | * |
Francois Retief | e3051d9 | 2015-10-28 14:29:32 +0200 | [diff] [blame] | 4 | * (C) Copyright 2007, 2015 |
| 5 | * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 6 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <common.h> |
| 11 | #include <asm/asi.h> |
| 12 | #include <asm/leon.h> |
Francois Retief | 7d07d68 | 2015-10-28 15:18:22 +0200 | [diff] [blame] | 13 | #include <asm/io.h> |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 14 | |
| 15 | #include <config.h> |
| 16 | |
| 17 | DECLARE_GLOBAL_DATA_PTR; |
| 18 | |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 19 | /* |
| 20 | * Breath some life into the CPU... |
| 21 | * |
| 22 | * Set up the memory map, |
| 23 | * initialize a bunch of registers. |
| 24 | * |
| 25 | * Run from FLASH/PROM: |
Loïc Minier | 5d0569a | 2011-02-03 22:04:26 +0100 | [diff] [blame] | 26 | * - until memory controller is set up, only registers available |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 27 | * - no global variables available for writing |
Loïc Minier | 5d0569a | 2011-02-03 22:04:26 +0100 | [diff] [blame] | 28 | * - constants available |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 29 | */ |
| 30 | |
| 31 | void cpu_init_f(void) |
| 32 | { |
| 33 | LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS; |
| 34 | |
| 35 | /* initialize the IRQMP */ |
| 36 | leon2->Interrupt_Force = 0; |
| 37 | leon2->Interrupt_Pending = 0; |
| 38 | leon2->Interrupt_Clear = 0xfffe; /* clear all old pending interrupts */ |
| 39 | leon2->Interrupt_Mask = 0xfffe0000; /* mask all IRQs */ |
| 40 | |
| 41 | /* cache */ |
| 42 | |
Francois Retief | 21ffc1f | 2015-11-21 17:07:48 +0200 | [diff] [blame] | 43 | /* I/O port setup */ |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 44 | #ifdef LEON2_IO_PORT_DIR |
Francois Retief | 21ffc1f | 2015-11-21 17:07:48 +0200 | [diff] [blame] | 45 | leon2->PIO_Direction = LEON2_IO_PORT_DIR; |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 46 | #endif |
| 47 | #ifdef LEON2_IO_PORT_DATA |
Francois Retief | 21ffc1f | 2015-11-21 17:07:48 +0200 | [diff] [blame] | 48 | leon2->PIO_Data = LEON2_IO_PORT_DATA; |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 49 | #endif |
| 50 | #ifdef LEON2_IO_PORT_INT |
Francois Retief | 21ffc1f | 2015-11-21 17:07:48 +0200 | [diff] [blame] | 51 | leon2->PIO_Interrupt = LEON2_IO_PORT_INT; |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 52 | #else |
Francois Retief | 21ffc1f | 2015-11-21 17:07:48 +0200 | [diff] [blame] | 53 | leon2->PIO_Interrupt = 0; |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 54 | #endif |
Francois Retief | 7d07d68 | 2015-10-28 15:18:22 +0200 | [diff] [blame] | 55 | |
| 56 | /* disable timers */ |
| 57 | leon2->Timer_Control_1 = leon2->Timer_Control_2 = 0; |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 58 | } |
| 59 | |
Francois Retief | e3051d9 | 2015-10-28 14:29:32 +0200 | [diff] [blame] | 60 | int arch_cpu_init(void) |
| 61 | { |
| 62 | gd->cpu_clk = CONFIG_SYS_CLK_FREQ; |
| 63 | gd->bus_clk = CONFIG_SYS_CLK_FREQ; |
| 64 | gd->ram_size = CONFIG_SYS_SDRAM_SIZE; |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 65 | |
Francois Retief | e3051d9 | 2015-10-28 14:29:32 +0200 | [diff] [blame] | 66 | return 0; |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 67 | } |
| 68 | |
| 69 | /* |
Francois Retief | 7d07d68 | 2015-10-28 15:18:22 +0200 | [diff] [blame] | 70 | * initialize higher level parts of CPU |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 71 | */ |
| 72 | int cpu_init_r(void) |
| 73 | { |
Francois Retief | 7d07d68 | 2015-10-28 15:18:22 +0200 | [diff] [blame] | 74 | return 0; |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 75 | } |
| 76 | |
Francois Retief | f7a9817 | 2015-11-21 23:15:07 +0200 | [diff] [blame] | 77 | /* initiate and setup timer0 to configured HZ. Base clock is 1MHz. |
Daniel Hellstrom | 207e695 | 2008-03-28 10:00:33 +0100 | [diff] [blame] | 78 | */ |
Francois Retief | 7d07d68 | 2015-10-28 15:18:22 +0200 | [diff] [blame] | 79 | int timer_init(void) |
| 80 | { |
| 81 | LEON2_regs *leon2 = (LEON2_regs *)LEON2_PREGS; |
| 82 | |
| 83 | /* initialize prescaler common to all timers to 1MHz */ |
| 84 | leon2->Scaler_Counter = leon2->Scaler_Reload = |
| 85 | (((CONFIG_SYS_CLK_FREQ / 1000) + 500) / 1000) - 1; |
| 86 | |
| 87 | /* SYS_HZ ticks per second */ |
| 88 | leon2->Timer_Counter_1 = 0; |
| 89 | leon2->Timer_Reload_1 = (CONFIG_SYS_TIMER_RATE / CONFIG_SYS_HZ) - 1; |
| 90 | leon2->Timer_Control_1 = LEON2_TIMER_CTRL_EN | LEON2_TIMER_CTRL_RS | |
| 91 | LEON2_TIMER_CTRL_LD; |
| 92 | |
| 93 | CONFIG_SYS_TIMER_COUNTER = (void *)&leon2->Timer_Counter_1; |
| 94 | return 0; |
| 95 | } |