blob: 76338d4e6c163a4069848a647d96459ccf075fe4 [file] [log] [blame]
Kumar Gala124b0822008-08-26 15:01:29 -05001/*
2 * Copyright 2008 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * Version 2 as published by the Free Software Foundation.
7 */
8
9#ifndef COMMON_TIMING_PARAMS_H
10#define COMMON_TIMING_PARAMS_H
11
12typedef struct {
13 /* parameters to constrict */
14
Priyanka Jain4a717412013-09-25 10:41:19 +053015 unsigned int tckmin_x_ps;
16 unsigned int tckmax_ps;
17 unsigned int tckmax_max_ps;
18 unsigned int trcd_ps;
19 unsigned int trp_ps;
20 unsigned int tras_ps;
Kumar Gala124b0822008-08-26 15:01:29 -050021
Priyanka Jain4a717412013-09-25 10:41:19 +053022 unsigned int twr_ps; /* maximum = 63750 ps */
23 unsigned int twtr_ps; /* maximum = 63750 ps */
24 unsigned int trfc_ps; /* maximum = 255 ns + 256 ns + .75 ns
Kumar Gala124b0822008-08-26 15:01:29 -050025 = 511750 ps */
26
Priyanka Jain4a717412013-09-25 10:41:19 +053027 unsigned int trrd_ps; /* maximum = 63750 ps */
28 unsigned int trc_ps; /* maximum = 254 ns + .75 ns = 254750 ps */
Kumar Gala124b0822008-08-26 15:01:29 -050029
30 unsigned int refresh_rate_ps;
Valentin Longchamp0b810932013-10-18 11:47:20 +020031 unsigned int extended_op_srt;
Kumar Gala124b0822008-08-26 15:01:29 -050032
Priyanka Jain4a717412013-09-25 10:41:19 +053033 unsigned int tis_ps; /* byte 32, spd->ca_setup */
34 unsigned int tih_ps; /* byte 33, spd->ca_hold */
35 unsigned int tds_ps; /* byte 34, spd->data_setup */
36 unsigned int tdh_ps; /* byte 35, spd->data_hold */
37 unsigned int trtp_ps; /* byte 38, spd->trtp */
38 unsigned int tdqsq_max_ps; /* byte 44, spd->tdqsq */
39 unsigned int tqhs_ps; /* byte 45, spd->tqhs */
Kumar Gala124b0822008-08-26 15:01:29 -050040
41 unsigned int ndimms_present;
42 unsigned int lowest_common_SPD_caslat;
43 unsigned int highest_common_derated_caslat;
44 unsigned int additive_latency;
Priyanka Jain4a717412013-09-25 10:41:19 +053045 unsigned int all_dimms_burst_lengths_bitmask;
46 unsigned int all_dimms_registered;
47 unsigned int all_dimms_unbuffered;
48 unsigned int all_dimms_ecc_capable;
Kumar Gala124b0822008-08-26 15:01:29 -050049
50 unsigned long long total_mem;
51 unsigned long long base_address;
yorkde879322010-07-02 22:25:55 +000052
53 /* DDR3 RDIMM */
54 unsigned char rcw[16]; /* Register Control Word 0-15 */
Kumar Gala124b0822008-08-26 15:01:29 -050055} common_timing_params_t;
56
57#endif