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git01.mediatek.com / filogic / uboot / c63fa1551c08bb8e1ca760497a8fc4e9f12a7e92 / . / include / configs / stv0991.h
blob: 0058dcd4bba53e73bb661a8896480a631ceca17a [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Vikas Manocha33913c52014-11-18 10:42:22 -0800[diff] [blame]2/*
Patrice Chotardcc551162017-10-23 09:53:59 +0200[diff] [blame]3 * Copyright (C) 2014, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha33913c52014-11-18 10:42:22 -0800[diff] [blame]5 */
6
7#ifndef __CONFIG_STV0991_H
8#define __CONFIG_STV0991_H
Vikas Manocha33913c52014-11-18 10:42:22 -0800[diff] [blame]9#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
Vikas Manocha32b9e712014-11-18 10:42:23 -0800[diff] [blame]10
Vikas Manocha33913c52014-11-18 10:42:22 -0800[diff] [blame]11/* ram memory-related information */
Vikas Manocha33913c52014-11-18 10:42:22 -0800[diff] [blame]12#define PHYS_SDRAM_1 0x00000000
13#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
14#define PHYS_SDRAM_1_SIZE 0x00198000
15
Vikas Manocha33913c52014-11-18 10:42:22 -0800[diff] [blame]16#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024)
17
Vikas Manocha33913c52014-11-18 10:42:22 -0800[diff] [blame]18/* user interface */
Vikas Manocha7f34a692014-11-18 10:42:24 -0800[diff] [blame]19#define CONFIG_SYS_CBSIZE 1024
Vikas Manocha33913c52014-11-18 10:42:22 -0800[diff] [blame]20
21/* MISC */
22#define CONFIG_SYS_LOAD_ADDR 0x00000000
Vikas Manochad70864c2014-12-01 12:27:53 -0800[diff] [blame]23#define CONFIG_SYS_INIT_RAM_SIZE 0x8000
Vikas Manocha33913c52014-11-18 10:42:22 -0800[diff] [blame]24#define CONFIG_SYS_INIT_RAM_ADDR 0x00190000
25#define CONFIG_SYS_INIT_SP_OFFSET \
26 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Bin Meng75574052016-02-05 19:30:11 -0800[diff] [blame]27/* U-Boot Load Address */
Vikas Manocha33913c52014-11-18 10:42:22 -0800[diff] [blame]28#define CONFIG_SYS_INIT_SP_ADDR \
29 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
30
Vikas Manocha32b9e712014-11-18 10:42:23 -0800[diff] [blame]31/* GMAC related configs */
32
Vikas Manocha32b9e712014-11-18 10:42:23 -0800[diff] [blame]33#define CONFIG_DW_ALTDESCRIPTOR
Vikas Manocha32b9e712014-11-18 10:42:23 -0800[diff] [blame]34
35/* Command support defines */
Vikas Manocha32b9e712014-11-18 10:42:23 -0800[diff] [blame]36#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
37
Vikas Manocha7f34a692014-11-18 10:42:24 -0800[diff] [blame]38/* Misc configuration */
Vikas Manocha7f34a692014-11-18 10:42:24 -0800[diff] [blame]39
Vikas Manocha7f34a692014-11-18 10:42:24 -0800[diff] [blame]40#define CONFIG_BOOTCOMMAND "go 0x40040000"
Stefan Roese83da3f12015-05-18 14:08:23 +0200[diff] [blame]41
Vikas Manocha8cc062f2015-07-02 18:29:41 -0700[diff] [blame]42/*
43+ * QSPI support
44+ */
45#ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */
Vikas Manocha8cc062f2015-07-02 18:29:41 -0700[diff] [blame]46#define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000
Vikas Manocha8cc062f2015-07-02 18:29:41 -0700[diff] [blame]47
Vikas Manocha8cc062f2015-07-02 18:29:41 -0700[diff] [blame]48#endif
49
Vikas Manocha33913c52014-11-18 10:42:22 -0800[diff] [blame]50#endif /* __CONFIG_H */