wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Cirrus Logic CS8900A Ethernet |
| 3 | * |
| 4 | * (C) Copyright 2002 |
| 5 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 6 | * Marius Groeger <mgroeger@sysgo.de> |
| 7 | * |
| 8 | * Copyright (C) 1999 Ben Williamson <benw@pobox.com> |
| 9 | * |
| 10 | * See file CREDITS for list of people who contributed to this |
| 11 | * project. |
| 12 | * |
| 13 | * This program is loaded into SRAM in bootstrap mode, where it waits |
| 14 | * for commands on UART1 to read and write memory, jump to code etc. |
| 15 | * A design goal for this program is to be entirely independent of the |
| 16 | * target board. Anything with a CL-PS7111 or EP7211 should be able to run |
| 17 | * this code in bootstrap mode. All the board specifics can be handled on |
| 18 | * the host. |
| 19 | * |
| 20 | * This program is free software; you can redistribute it and/or modify |
| 21 | * it under the terms of the GNU General Public License as published by |
| 22 | * the Free Software Foundation; either version 2 of the License, or |
| 23 | * (at your option) any later version. |
| 24 | * |
| 25 | * This program is distributed in the hope that it will be useful, |
| 26 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 27 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 28 | * GNU General Public License for more details. |
| 29 | * |
| 30 | * You should have received a copy of the GNU General Public License |
| 31 | * along with this program; if not, write to the Free Software |
| 32 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 33 | */ |
| 34 | |
| 35 | #include <common.h> |
| 36 | #include <command.h> |
| 37 | #include "cs8900.h" |
| 38 | #include <net.h> |
| 39 | |
| 40 | #ifdef CONFIG_DRIVER_CS8900 |
| 41 | |
| 42 | #if (CONFIG_COMMANDS & CFG_CMD_NET) |
| 43 | |
| 44 | |
| 45 | /* packet page register access functions */ |
| 46 | |
| 47 | #ifdef CS8900_BUS32 |
| 48 | /* we don't need 16 bit initialisation on 32 bit bus */ |
| 49 | #define get_reg_init_bus(x) get_reg((x)) |
| 50 | #else |
| 51 | static unsigned short get_reg_init_bus(int regno) |
| 52 | { |
| 53 | /* force 16 bit busmode */ |
| 54 | volatile unsigned char c; |
| 55 | c = CS8900_BUS16_0; |
| 56 | c = CS8900_BUS16_1; |
| 57 | c = CS8900_BUS16_0; |
| 58 | c = CS8900_BUS16_1; |
| 59 | c = CS8900_BUS16_0; |
| 60 | |
| 61 | CS8900_PPTR = regno; |
| 62 | return (unsigned short) CS8900_PDATA; |
| 63 | } |
| 64 | #endif |
| 65 | |
| 66 | static unsigned short |
| 67 | get_reg(int regno) |
| 68 | { |
| 69 | CS8900_PPTR = regno; |
| 70 | return (unsigned short) CS8900_PDATA; |
| 71 | } |
| 72 | |
| 73 | |
| 74 | static void put_reg(int regno, unsigned short val) |
| 75 | { |
| 76 | CS8900_PPTR = regno; |
| 77 | CS8900_PDATA = val; |
| 78 | } |
| 79 | |
| 80 | static void eth_reset(void) |
| 81 | { |
| 82 | int tmo; |
| 83 | unsigned short us; |
| 84 | |
| 85 | /* reset NIC */ |
| 86 | put_reg(PP_SelfCTL, get_reg(PP_SelfCTL) | PP_SelfCTL_Reset ); |
| 87 | |
| 88 | /* wait for 200ms */ |
| 89 | udelay(200000); |
| 90 | /* Wait until the chip is reset */ |
| 91 | |
| 92 | tmo = get_timer(0) + 1 * CFG_HZ; |
| 93 | while ((((us = get_reg_init_bus(PP_SelfSTAT)) & PP_SelfSTAT_InitD) == 0) |
| 94 | && tmo < get_timer(0)) |
| 95 | /*NOP*/; |
| 96 | } |
| 97 | |
| 98 | void cs8900_get_enetaddr (uchar *addr) |
| 99 | { |
| 100 | int i; |
| 101 | /* verify chip id */ |
| 102 | if (get_reg_init_bus(PP_ChipID) != 0x630e) |
| 103 | return; |
| 104 | eth_reset(); |
| 105 | if ((get_reg(PP_SelfST) & (PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) == |
| 106 | (PP_SelfSTAT_EEPROM|PP_SelfSTAT_EEPROM_OK)) { |
| 107 | /* Load the MAC from EEPROM */ |
| 108 | for (i=0; i<6/2; i++) { |
| 109 | unsigned int Addr; |
| 110 | Addr = get_reg(PP_IA+i*2); |
| 111 | addr[i*2] = Addr & 0xFF; |
| 112 | addr[i*2+1] = Addr >> 8; |
| 113 | } |
| 114 | } |
| 115 | } |
| 116 | |
| 117 | void eth_halt( void ) |
| 118 | { |
| 119 | /* disable transmitter/receiver mode */ |
| 120 | put_reg(PP_LineCTL, 0); |
| 121 | |
| 122 | /* "shutdown" to show ChipID or kernel wouldn't find he cs8900 ... */ |
| 123 | get_reg_init_bus(PP_ChipID); |
| 124 | } |
| 125 | |
| 126 | int eth_init( bd_t *bd ) |
| 127 | { |
| 128 | |
| 129 | /* verify chip id */ |
| 130 | if (get_reg_init_bus(PP_ChipID) != 0x630e) |
| 131 | { |
| 132 | printf( "CS8900 Ethernet chip not found?!\n" ); |
| 133 | return 0; |
| 134 | } |
| 135 | |
| 136 | eth_reset(); |
| 137 | /* set the ethernet address */ |
| 138 | put_reg(PP_IA + 0, bd->bi_enetaddr[0] | (bd->bi_enetaddr[1] << 8)); |
| 139 | put_reg(PP_IA + 2, bd->bi_enetaddr[2] | (bd->bi_enetaddr[3] << 8)); |
| 140 | put_reg(PP_IA + 4, bd->bi_enetaddr[4] | (bd->bi_enetaddr[5] << 8)); |
| 141 | |
| 142 | /* receive only error free packets addressed to this card */ |
| 143 | put_reg(PP_RxCTL, PP_RxCTL_IA | PP_RxCTL_Broadcast | PP_RxCTL_RxOK); |
| 144 | |
| 145 | /* do not generate any interrupts on receive operations */ |
| 146 | put_reg(PP_RxCFG, 0); |
| 147 | |
| 148 | /* do not generate any interrupts on transmit operations */ |
| 149 | put_reg(PP_TxCFG, 0); |
| 150 | |
| 151 | /* do not generate any interrupts on buffer operations */ |
| 152 | put_reg(PP_BufCFG, 0); |
| 153 | |
| 154 | /* enable transmitter/receiver mode */ |
| 155 | put_reg(PP_LineCTL, PP_LineCTL_Rx | PP_LineCTL_Tx); |
| 156 | |
| 157 | return 0; |
| 158 | } |
| 159 | |
| 160 | /* Get a data block via Ethernet */ |
| 161 | extern int eth_rx(void) |
| 162 | { |
| 163 | int i; |
| 164 | unsigned short rxlen; |
| 165 | unsigned short *addr; |
| 166 | unsigned short status; |
| 167 | |
| 168 | status = get_reg(PP_RER); |
| 169 | |
| 170 | if ((status & PP_RER_RxOK) == 0) |
| 171 | return 0; |
| 172 | |
| 173 | status = CS8900_RTDATA; /* stat */ |
| 174 | rxlen = CS8900_RTDATA; /* len */ |
| 175 | |
| 176 | if(rxlen > PKTSIZE_ALIGN + PKTALIGN) |
| 177 | printf("packet too big!\n"); |
| 178 | |
| 179 | for(addr = (unsigned short *)NetRxPackets[0], i = rxlen >> 1; i > 0; i-- ) |
| 180 | *addr++ = CS8900_RTDATA; |
| 181 | if(rxlen & 1) |
| 182 | *addr++ = CS8900_RTDATA; |
| 183 | |
| 184 | /* Pass the packet up to the protocol layers. */ |
| 185 | NetReceive(NetRxPackets[0], rxlen); |
| 186 | |
| 187 | return rxlen; |
| 188 | } |
| 189 | |
| 190 | /* Send a data block via Ethernet. */ |
| 191 | extern int eth_send(volatile void *packet, int length) |
| 192 | { |
| 193 | volatile unsigned short *addr; |
| 194 | int tmo; |
| 195 | unsigned short s; |
| 196 | |
| 197 | retry: |
| 198 | /* initiate a transmit sequence */ |
| 199 | CS8900_TxCMD = PP_TxCmd_TxStart_Full; |
| 200 | CS8900_TxLEN = length; |
| 201 | |
| 202 | /* Test to see if the chip has allocated memory for the packet */ |
| 203 | if ((get_reg(PP_BusSTAT) & PP_BusSTAT_TxRDY) == 0) { |
| 204 | /* Oops... this should not happen! */ |
| 205 | printf("cs: unable to send packet; retrying...\n"); |
| 206 | for (tmo = get_timer(0) + 5 * CFG_HZ; get_timer(0) < tmo; ) |
| 207 | /*NOP*/; |
| 208 | eth_reset(); |
| 209 | goto retry; |
| 210 | } |
| 211 | |
| 212 | /* Write the contents of the packet */ |
| 213 | /* assume even number of bytes */ |
| 214 | for(addr = packet; length > 0; length -= 2 ) |
| 215 | CS8900_RTDATA = *addr++; |
| 216 | |
| 217 | /* wait for transfer to succeed */ |
| 218 | tmo = get_timer(0) + 5 * CFG_HZ; |
| 219 | while((s = get_reg(PP_TER) & ~0x1F) == 0) |
| 220 | { |
| 221 | if (get_timer(0) >= tmo) |
| 222 | break; |
| 223 | } |
| 224 | |
| 225 | /* nothing */ ; |
| 226 | if ((s & (PP_TER_CRS | PP_TER_TxOK)) != PP_TER_TxOK) { |
| 227 | printf("\ntransmission error %#x\n", s); |
| 228 | } |
| 229 | |
| 230 | return 0; |
| 231 | } |
| 232 | |
| 233 | #endif /* COMMANDS & CFG_NET */ |
| 234 | |
| 235 | #endif /* CONFIG_DRIVER_CS8900 */ |