blob: b35c795704ab540fa5564fab5056e03700458c35 [file] [log] [blame]
Jim Liuc32c95c2023-11-14 16:51:59 +08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (c) 2023 Nuvoton Technology Corp.
4 */
5
6#include <clk.h>
7#include <dm.h>
8#include <env.h>
9#include <serial.h>
10#include <linux/delay.h>
11
12#define UART_DLL 0x0
13#define UART_DLM 0x4
14#define UART_LCR 0xc
15#define LCR_DLAB BIT(7)
16
17void board_set_console(void)
18{
19 const unsigned long baudrate_table[] = CFG_SYS_BAUDRATE_TABLE;
20 struct udevice *dev = gd->cur_serial_dev;
21 unsigned int baudrate, max_delta;
22 void __iomem *uart_reg;
23 struct clk clk;
24 char string[32];
25 u32 uart_clk;
26 u8 dll, dlm;
27 u16 divisor;
28 int ret, i;
29
30 if (!dev)
31 return;
32
33 uart_reg = dev_read_addr_ptr(dev);
34 ret = clk_get_by_index(dev, 0, &clk);
35 if (ret)
36 return;
37
38 uart_clk = clk_get_rate(&clk);
39 setbits_8(uart_reg + UART_LCR, LCR_DLAB);
40 dll = readb(uart_reg + UART_DLL);
41 dlm = readb(uart_reg + UART_DLM);
42 clrbits_8(uart_reg + UART_LCR, LCR_DLAB);
43 divisor = dll | (dlm << 8);
44 baudrate = uart_clk / ((16 * (divisor + 2)));
45 for (i = 0; i < ARRAY_SIZE(baudrate_table); ++i) {
46 max_delta = baudrate_table[i] / 20;
47 if (abs(baudrate - baudrate_table[i]) < max_delta) {
48 /* The baudrate is supported */
49 gd->baudrate = baudrate_table[i];
50 break;
51 }
52 }
53
54 if (i == ARRAY_SIZE(baudrate_table)) {
55 /* current baudrate is not suitable, set to default */
56 divisor = DIV_ROUND_CLOSEST(uart_clk, 16 * gd->baudrate) - 2;
57 setbits_8(uart_reg + UART_LCR, LCR_DLAB);
58 writeb(divisor & 0xff, uart_reg + UART_DLL);
59 writeb(divisor >> 8, uart_reg + UART_DLM);
60 clrbits_8(uart_reg + UART_LCR, LCR_DLAB);
61 udelay(100);
62 printf("\r\nUART(source %u): change baudrate from %u to %u\n",
63 uart_clk, baudrate, uart_clk / ((16 * (divisor + 2))));
64 }
65
66 debug("Set env baudrate=%u\n", gd->baudrate);
67 snprintf(string, sizeof(string), "ttyS0,%un8", gd->baudrate);
68 env_set("console", string);
69
70}