Wolfgang Denk | 4646d2a | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 1 | /** |
| 2 | * @file IxNpeDlMacros_p.h |
| 3 | * |
| 4 | * @author Intel Corporation |
| 5 | * @date 21 January 2002 |
| 6 | * |
| 7 | * @brief This file contains the macros for the IxNpeDl component. |
| 8 | * |
| 9 | * |
| 10 | * @par |
| 11 | * IXP400 SW Release version 2.0 |
| 12 | * |
| 13 | * -- Copyright Notice -- |
| 14 | * |
| 15 | * @par |
| 16 | * Copyright 2001-2005, Intel Corporation. |
| 17 | * All rights reserved. |
| 18 | * |
| 19 | * @par |
Wolfgang Denk | c57eadc | 2013-07-28 22:12:47 +0200 | [diff] [blame^] | 20 | * SPDX-License-Identifier: BSD-3-Clause |
Wolfgang Denk | 4646d2a | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 21 | * @par |
| 22 | * -- End of Copyright Notice -- |
| 23 | */ |
| 24 | |
| 25 | /** |
| 26 | * @defgroup IxNpeDlMacros_p IxNpeDlMacros_p |
| 27 | * |
| 28 | * @brief Macros for the IxNpeDl component. |
| 29 | * |
| 30 | * @{ |
| 31 | */ |
| 32 | |
| 33 | #ifndef IXNPEDLMACROS_P_H |
| 34 | #define IXNPEDLMACROS_P_H |
| 35 | |
| 36 | |
| 37 | /* |
| 38 | * Put the user defined include files required. |
| 39 | */ |
| 40 | #if (CPU != XSCALE) |
| 41 | /* To support IxNpeDl unit tests... */ |
| 42 | #include <stdio.h> |
| 43 | #include "test/IxNpeDlTestReg.h" |
| 44 | |
| 45 | #else |
| 46 | #include "IxOsal.h" |
| 47 | |
| 48 | #endif |
| 49 | |
| 50 | |
| 51 | /* |
| 52 | * Typedefs |
| 53 | */ |
| 54 | |
| 55 | /** |
| 56 | * @typedef IxNpeDlTraceTypes |
| 57 | * @brief Enumeration defining IxNpeDl trace levels |
| 58 | */ |
| 59 | typedef enum |
| 60 | { |
| 61 | IX_NPEDL_TRACE_OFF, /**< no trace */ |
| 62 | IX_NPEDL_DEBUG, /**< debug */ |
| 63 | IX_NPEDL_FN_ENTRY_EXIT /**< function entry/exit */ |
| 64 | } IxNpeDlTraceTypes; |
| 65 | |
| 66 | |
| 67 | /* |
| 68 | * #defines and macros. |
| 69 | */ |
| 70 | |
| 71 | /* Implementation of the following macros for use with IxNpeDl unit test code */ |
| 72 | #if (CPU != XSCALE) |
| 73 | |
| 74 | |
| 75 | /** |
| 76 | * @def IX_NPEDL_TRACE_LEVEL |
| 77 | * |
| 78 | * @brief IxNpeDl debug trace level |
| 79 | */ |
| 80 | #define IX_NPEDL_TRACE_LEVEL IX_NPEDL_FN_ENTRY_EXIT |
| 81 | |
| 82 | /** |
| 83 | * @def IX_NPEDL_ERROR_REPORT |
| 84 | * |
| 85 | * @brief Mechanism for reporting IxNpeDl software errors |
| 86 | * |
| 87 | * @param char* [in] STR - Error string to report |
| 88 | * |
| 89 | * This macro simply prints the error string passed. |
| 90 | * Intended for use with IxNpeDl unit test code. |
| 91 | * |
| 92 | * @return none |
| 93 | */ |
| 94 | #define IX_NPEDL_ERROR_REPORT(STR) printf ("IxNpeDl ERROR: %s\n", (STR)); |
| 95 | |
| 96 | /** |
| 97 | * @def IX_NPEDL_WARNING_REPORT |
| 98 | * |
| 99 | * @brief Mechanism for reporting IxNpeDl software errors |
| 100 | * |
| 101 | * @param char* [in] STR - Error string to report |
| 102 | * |
| 103 | * This macro simply prints the error string passed. |
| 104 | * Intended for use with IxNpeDl unit test code. |
| 105 | * |
| 106 | * @return none |
| 107 | */ |
| 108 | #define IX_NPEDL_WARNING_REPORT(STR) printf ("IxNpeDl WARNING: %s\n", (STR)); |
| 109 | |
| 110 | /** |
| 111 | * @def IX_NPEDL_TRACE0 |
| 112 | * |
| 113 | * @brief Mechanism for tracing debug for the IxNpeDl component, for no arguments |
| 114 | * |
| 115 | * @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values |
| 116 | * @param char* [in] STR - Trace string |
| 117 | * |
| 118 | * This macro simply prints the trace string passed, if the level is supported. |
| 119 | * Intended for use with IxNpeDl unit test code. |
| 120 | * |
| 121 | * @return none |
| 122 | */ |
| 123 | #define IX_NPEDL_TRACE0(LEVEL, STR) \ |
| 124 | { \ |
| 125 | if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \ |
| 126 | { \ |
| 127 | printf ("IxNpeDl TRACE: "); \ |
| 128 | printf ((STR)); \ |
| 129 | printf ("\n"); \ |
| 130 | } \ |
| 131 | } |
| 132 | |
| 133 | /** |
| 134 | * @def IX_NPEDL_TRACE1 |
| 135 | * |
| 136 | * @brief Mechanism for tracing debug for the IxNpeDl component, with 1 argument |
| 137 | * |
| 138 | * @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values |
| 139 | * @param char* [in] STR - Trace string |
| 140 | * @param argType [in] ARG1 - Argument to trace |
| 141 | * |
| 142 | * This macro simply prints the trace string passed, if the level is supported. |
| 143 | * Intended for use with IxNpeDl unit test code. |
| 144 | * |
| 145 | * @return none |
| 146 | */ |
| 147 | #define IX_NPEDL_TRACE1(LEVEL, STR, ARG1) \ |
| 148 | { \ |
| 149 | if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \ |
| 150 | { \ |
| 151 | printf ("IxNpeDl TRACE: "); \ |
| 152 | printf (STR, ARG1); \ |
| 153 | printf ("\n"); \ |
| 154 | } \ |
| 155 | } |
| 156 | |
| 157 | /** |
| 158 | * @def IX_NPEDL_TRACE2 |
| 159 | * |
| 160 | * @brief Mechanism for tracing debug for the IxNpeDl component, with 2 arguments |
| 161 | * |
| 162 | * @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values |
| 163 | * @param char* [in] STR - Trace string |
| 164 | * @param argType [in] ARG1 - Argument to trace |
| 165 | * @param argType [in] ARG2 - Argument to trace |
| 166 | * |
| 167 | * This macro simply prints the trace string passed, if the level is supported. |
| 168 | * Intended for use with IxNpeDl unit test code. |
| 169 | * |
| 170 | * @return none |
| 171 | */ |
| 172 | #define IX_NPEDL_TRACE2(LEVEL, STR, ARG1, ARG2) \ |
| 173 | { \ |
| 174 | if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \ |
| 175 | { \ |
| 176 | printf ("IxNpeDl TRACE: "); \ |
| 177 | printf (STR, ARG1, ARG2); \ |
| 178 | printf ("\n"); \ |
| 179 | } \ |
| 180 | } |
| 181 | |
| 182 | |
| 183 | /** |
| 184 | * @def IX_NPEDL_REG_WRITE |
| 185 | * |
| 186 | * @brief Mechanism for writing to a memory-mapped register |
| 187 | * |
| 188 | * @param UINT32 [in] base - Base memory address for this NPE's registers |
| 189 | * @param UINT32 [in] offset - Offset from base memory address |
| 190 | * @param UINT32 [in] value - Value to write to register |
| 191 | * |
| 192 | * This macro calls a function from Unit Test code to write a register. This |
| 193 | * allows extra flexibility for unit testing of the IxNpeDl component. |
| 194 | * |
| 195 | * @return none |
| 196 | */ |
| 197 | #define IX_NPEDL_REG_WRITE(base, offset, value) \ |
| 198 | { \ |
| 199 | ixNpeDlTestRegWrite (base, offset, value); \ |
| 200 | } |
| 201 | |
| 202 | |
| 203 | /** |
| 204 | * @def IX_NPEDL_REG_READ |
| 205 | * |
| 206 | * @brief Mechanism for reading from a memory-mapped register |
| 207 | * |
| 208 | * @param UINT32 [in] base - Base memory address for this NPE's registers |
| 209 | * @param UINT32 [in] offset - Offset from base memory address |
| 210 | * @param UINT32 *[out] value - Value read from register |
| 211 | * |
| 212 | * This macro calls a function from Unit Test code to read a register. This |
| 213 | * allows extra flexibility for unit testing of the IxNpeDl component. |
| 214 | * |
| 215 | * @return none |
| 216 | */ |
| 217 | #define IX_NPEDL_REG_READ(base, offset, value) \ |
| 218 | { \ |
| 219 | ixNpeDlTestRegRead (base, offset, value); \ |
| 220 | } |
| 221 | |
| 222 | |
| 223 | /* Implementation of the following macros when integrated with IxOsal */ |
| 224 | #else /* #if (CPU != XSCALE) */ |
| 225 | |
| 226 | |
| 227 | /** |
| 228 | * @def IX_NPEDL_TRACE_LEVEL |
| 229 | * |
| 230 | * @brief IxNpeDl debug trace level |
| 231 | */ |
| 232 | #define IX_NPEDL_TRACE_LEVEL IX_NPEDL_DEBUG |
| 233 | |
| 234 | |
| 235 | /** |
| 236 | * @def IX_NPEDL_ERROR_REPORT |
| 237 | * |
| 238 | * @brief Mechanism for reporting IxNpeDl software errors |
| 239 | * |
| 240 | * @param char* [in] STR - Error string to report |
| 241 | * |
| 242 | * This macro is used to report IxNpeDl software errors. |
| 243 | * |
| 244 | * @return none |
| 245 | */ |
| 246 | #define IX_NPEDL_ERROR_REPORT(STR) \ |
| 247 | ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, STR, 0, 0, 0, 0, 0, 0); |
| 248 | |
| 249 | /** |
| 250 | * @def IX_NPEDL_WARNING_REPORT |
| 251 | * |
| 252 | * @brief Mechanism for reporting IxNpeDl software warnings |
| 253 | * |
| 254 | * @param char* [in] STR - Warning string to report |
| 255 | * |
| 256 | * This macro is used to report IxNpeDl software warnings. |
| 257 | * |
| 258 | * @return none |
| 259 | */ |
| 260 | #define IX_NPEDL_WARNING_REPORT(STR) \ |
| 261 | ixOsalLog (IX_OSAL_LOG_LVL_WARNING, IX_OSAL_LOG_DEV_STDOUT, STR, 0, 0, 0, 0, 0, 0); |
| 262 | |
| 263 | |
| 264 | /** |
| 265 | * @def IX_NPEDL_TRACE0 |
| 266 | * |
| 267 | * @brief Mechanism for tracing debug for the IxNpeDl component, for no arguments |
| 268 | * |
| 269 | * @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values |
| 270 | * @param char* [in] STR - Trace string |
| 271 | * |
| 272 | * This macro simply prints the trace string passed, if the level is supported. |
| 273 | * |
| 274 | * @return none |
| 275 | */ |
| 276 | #define IX_NPEDL_TRACE0(LEVEL, STR) \ |
| 277 | { \ |
| 278 | if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \ |
| 279 | { \ |
| 280 | if (LEVEL == IX_NPEDL_FN_ENTRY_EXIT) \ |
| 281 | { \ |
| 282 | ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3, IX_OSAL_LOG_DEV_STDOUT, STR, 0, 0, 0, 0, 0, 0); \ |
| 283 | } \ |
| 284 | else if (LEVEL == IX_NPEDL_DEBUG) \ |
| 285 | { \ |
| 286 | ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, STR, 0, 0, 0, 0, 0, 0); \ |
| 287 | } \ |
| 288 | } \ |
| 289 | } |
| 290 | |
| 291 | /** |
| 292 | * @def IX_NPEDL_TRACE1 |
| 293 | * |
| 294 | * @brief Mechanism for tracing debug for the IxNpeDl component, with 1 argument |
| 295 | * |
| 296 | * @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values |
| 297 | * @param char* [in] STR - Trace string |
| 298 | * @param argType [in] ARG1 - Argument to trace |
| 299 | * |
| 300 | * This macro simply prints the trace string passed, if the level is supported. |
| 301 | * |
| 302 | * @return none |
| 303 | */ |
| 304 | #define IX_NPEDL_TRACE1(LEVEL, STR, ARG1) \ |
| 305 | { \ |
| 306 | if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \ |
| 307 | { \ |
| 308 | if (LEVEL == IX_NPEDL_FN_ENTRY_EXIT) \ |
| 309 | { \ |
| 310 | ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3, IX_OSAL_LOG_DEV_STDOUT, STR, ARG1, 0, 0, 0, 0, 0); \ |
| 311 | } \ |
| 312 | else if (LEVEL == IX_NPEDL_DEBUG) \ |
| 313 | { \ |
| 314 | ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, STR, ARG1, 0, 0, 0, 0, 0); \ |
| 315 | } \ |
| 316 | } \ |
| 317 | } |
| 318 | |
| 319 | /** |
| 320 | * @def IX_NPEDL_TRACE2 |
| 321 | * |
| 322 | * @brief Mechanism for tracing debug for the IxNpeDl component, with 2 arguments |
| 323 | * |
| 324 | * @param unsigned [in] LEVEL - one of IxNpeDlTraceTypes enumerated values |
| 325 | * @param char* [in] STR - Trace string |
| 326 | * @param argType [in] ARG1 - Argument to trace |
| 327 | * @param argType [in] ARG2 - Argument to trace |
| 328 | * |
| 329 | * This macro simply prints the trace string passed, if the level is supported. |
| 330 | * |
| 331 | * @return none |
| 332 | */ |
| 333 | #define IX_NPEDL_TRACE2(LEVEL, STR, ARG1, ARG2) \ |
| 334 | { \ |
| 335 | if (LEVEL <= IX_NPEDL_TRACE_LEVEL) \ |
| 336 | { \ |
| 337 | if (LEVEL == IX_NPEDL_FN_ENTRY_EXIT) \ |
| 338 | { \ |
| 339 | ixOsalLog (IX_OSAL_LOG_LVL_DEBUG3, IX_OSAL_LOG_DEV_STDOUT, STR, ARG1, ARG2, 0, 0, 0, 0); \ |
| 340 | } \ |
| 341 | else if (LEVEL == IX_NPEDL_DEBUG) \ |
| 342 | { \ |
| 343 | ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, STR, ARG1, ARG2, 0, 0, 0, 0); \ |
| 344 | } \ |
| 345 | } \ |
| 346 | } |
| 347 | |
| 348 | /** |
| 349 | * @def IX_NPEDL_REG_WRITE |
| 350 | * |
| 351 | * @brief Mechanism for writing to a memory-mapped register |
| 352 | * |
| 353 | * @param UINT32 [in] base - Base memory address for this NPE's registers |
| 354 | * @param UINT32 [in] offset - Offset from base memory address |
| 355 | * @param UINT32 [in] value - Value to write to register |
| 356 | * |
| 357 | * This macro forms the address of the register from base address + offset, and |
| 358 | * dereferences that address to write the contents of the register. |
| 359 | * |
| 360 | * @return none |
| 361 | */ |
| 362 | #define IX_NPEDL_REG_WRITE(base, offset, value) \ |
| 363 | IX_OSAL_WRITE_LONG(((base) + (offset)), (value)) |
| 364 | |
| 365 | |
| 366 | |
| 367 | /** |
| 368 | * @def IX_NPEDL_REG_READ |
| 369 | * |
| 370 | * @brief Mechanism for reading from a memory-mapped register |
| 371 | * |
| 372 | * @param UINT32 [in] base - Base memory address for this NPE's registers |
| 373 | * @param UINT32 [in] offset - Offset from base memory address |
| 374 | * @param UINT32 *[out] value - Value read from register |
| 375 | * |
| 376 | * This macro forms the address of the register from base address + offset, and |
| 377 | * dereferences that address to read the register contents. |
| 378 | * |
| 379 | * @return none |
| 380 | */ |
| 381 | #define IX_NPEDL_REG_READ(base, offset, value) \ |
| 382 | *(value) = IX_OSAL_READ_LONG(((base) + (offset))) |
| 383 | |
| 384 | #endif /* #if (CPU != XSCALE) */ |
| 385 | |
| 386 | #endif /* IXNPEDLMACROS_P_H */ |
| 387 | |
| 388 | /** |
| 389 | * @} defgroup IxNpeDlMacros_p |
| 390 | */ |