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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vikas Manocha33913c52014-11-18 10:42:22 -08002/*
Patrice Chotardcc551162017-10-23 09:53:59 +02003 * Copyright (C) 2014, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha33913c52014-11-18 10:42:22 -08005 */
6
7#include <common.h>
Simon Glass97589732020-05-10 11:40:02 -06008#include <init.h>
Simon Glass495a5dc2019-11-14 12:57:30 -07009#include <time.h>
Vikas Manocha33913c52014-11-18 10:42:22 -080010#include <asm/io.h>
11#include <asm/arch-stv0991/hardware.h>
12#include <asm/arch-stv0991/stv0991_cgu.h>
13#include <asm/arch-stv0991/stv0991_gpt.h>
Simon Glassdbd79542020-05-10 11:40:11 -060014#include <linux/delay.h>
Vikas Manocha33913c52014-11-18 10:42:22 -080015
16static struct stv0991_cgu_regs *const stv0991_cgu_regs = \
17 (struct stv0991_cgu_regs *) (CGU_BASE_ADDR);
18
19#define READ_TIMER() (readl(&gpt1_regs_ptr->cnt) & GPT_FREE_RUNNING)
20#define GPT_RESOLUTION (CONFIG_STV0991_HZ_CLOCK / CONFIG_STV0991_HZ)
21
22DECLARE_GLOBAL_DATA_PTR;
23
24#define timestamp gd->arch.tbl
25#define lastdec gd->arch.lastinc
26
Patrick Delaunay9858a602018-10-05 11:33:52 +020027static ulong get_timer_masked(void);
28
Vikas Manocha33913c52014-11-18 10:42:22 -080029int timer_init(void)
30{
31 /* Timer1 clock configuration */
32 writel(TIMER1_CLK_CFG, &stv0991_cgu_regs->tim_freq);
33 writel(readl(&stv0991_cgu_regs->cgu_enable_2) |
34 TIMER1_CLK_EN, &stv0991_cgu_regs->cgu_enable_2);
35
36 /* Stop the timer */
37 writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1);
38 writel(GPT_PRESCALER_128, &gpt1_regs_ptr->psc);
39 /* Configure timer for auto-reload */
40 writel(readl(&gpt1_regs_ptr->cr1) | GPT_MODE_AUTO_RELOAD,
41 &gpt1_regs_ptr->cr1);
42
43 /* load value for free running */
44 writel(GPT_FREE_RUNNING, &gpt1_regs_ptr->arr);
45
46 /* start timer */
47 writel(readl(&gpt1_regs_ptr->cr1) | GPT_CR1_CEN,
48 &gpt1_regs_ptr->cr1);
49
50 /* Reset the timer */
51 lastdec = READ_TIMER();
52 timestamp = 0;
53
54 return 0;
55}
56
57/*
58 * timer without interrupts
59 */
60ulong get_timer(ulong base)
61{
62 return (get_timer_masked() / GPT_RESOLUTION) - base;
63}
64
65void __udelay(unsigned long usec)
66{
67 ulong tmo;
68 ulong start = get_timer_masked();
69 ulong tenudelcnt = CONFIG_STV0991_HZ_CLOCK / (1000 * 100);
70 ulong rndoff;
71
72 rndoff = (usec % 10) ? 1 : 0;
73
74 /* tenudelcnt timer tick gives 10 microsecconds delay */
75 tmo = ((usec / 10) + rndoff) * tenudelcnt;
76
77 while ((ulong) (get_timer_masked() - start) < tmo)
78 ;
79}
80
Patrick Delaunay9858a602018-10-05 11:33:52 +020081static ulong get_timer_masked(void)
Vikas Manocha33913c52014-11-18 10:42:22 -080082{
83 ulong now = READ_TIMER();
84
85 if (now >= lastdec) {
86 /* normal mode */
87 timestamp += now - lastdec;
88 } else {
89 /* we have an overflow ... */
90 timestamp += now + GPT_FREE_RUNNING - lastdec;
91 }
92 lastdec = now;
93
94 return timestamp;
95}
96
Vikas Manocha33913c52014-11-18 10:42:22 -080097/*
98 * This function is derived from PowerPC code (read timebase as long long).
99 * On ARM it just returns the timer value.
100 */
101unsigned long long get_ticks(void)
102{
103 return get_timer(0);
104}
105
106/*
107 * This function is derived from PowerPC code (timebase clock frequency).
108 * On ARM it returns the number of timer ticks per second.
109 */
110ulong get_tbclk(void)
111{
112 return CONFIG_STV0991_HZ;
113}