blob: f2ba354c24f8d468f23c81d261177144ffe2ea48 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Steve Rae45f2c702016-06-02 15:10:56 -07002/*
3 * Copyright 2013 Broadcom Corporation.
Steve Rae45f2c702016-06-02 15:10:56 -07004 */
5
6#include <common.h>
7#include <asm/io.h>
Masahiro Yamada56a931c2016-09-21 11:28:55 +09008#include <linux/errno.h>
Steve Rae45f2c702016-06-02 15:10:56 -07009#include <asm/arch/sysmap.h>
10#include <asm/kona-common/clk.h>
11#include "clk-core.h"
12
13/* Enable appropriate clocks for an SDIO port */
14int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)
15{
16 int ret;
17 struct clk *c;
18
19 char *clkstr;
20 char *slpstr;
21 char *ahbstr;
22
23 switch ((u32) base) {
24 case CONFIG_SYS_SDIO_BASE0:
25 clkstr = CONFIG_SYS_SDIO0 "_clk";
26 ahbstr = CONFIG_SYS_SDIO0 "_ahb_clk";
27 slpstr = CONFIG_SYS_SDIO0 "_sleep_clk";
28 break;
29 case CONFIG_SYS_SDIO_BASE1:
30 clkstr = CONFIG_SYS_SDIO1 "_clk";
31 ahbstr = CONFIG_SYS_SDIO1 "_ahb_clk";
32 slpstr = CONFIG_SYS_SDIO1 "_sleep_clk";
33 break;
34 case CONFIG_SYS_SDIO_BASE2:
35 clkstr = CONFIG_SYS_SDIO2 "_clk";
36 ahbstr = CONFIG_SYS_SDIO2 "_ahb_clk";
37 slpstr = CONFIG_SYS_SDIO2 "_sleep_clk";
38 break;
39 case CONFIG_SYS_SDIO_BASE3:
40 clkstr = CONFIG_SYS_SDIO3 "_clk";
41 ahbstr = CONFIG_SYS_SDIO3 "_ahb_clk";
42 slpstr = CONFIG_SYS_SDIO3 "_sleep_clk";
43 break;
44 default:
45 printf("%s: base 0x%p not found\n", __func__, base);
46 return -EINVAL;
47 }
48
49 ret = clk_get_and_enable(ahbstr);
50 if (ret)
51 return ret;
52
53 ret = clk_get_and_enable(slpstr);
54 if (ret)
55 return ret;
56
57 c = clk_get(clkstr);
58 if (c) {
59 ret = clk_set_rate(c, rate);
60 if (ret)
61 return ret;
62
63 ret = clk_enable(c);
64 if (ret)
65 return ret;
66 } else {
67 printf("%s: Couldn't find %s\n", __func__, clkstr);
68 return -EINVAL;
69 }
70 *actual_ratep = rate;
71 return 0;
72}