blob: 05ada258eacf88e9743e2a278e8f2593c3ea8da3 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Steve Rae45f2c702016-06-02 15:10:56 -07002/*
3 * Copyright 2013 Broadcom Corporation.
Steve Rae45f2c702016-06-02 15:10:56 -07004 */
5
6#ifndef __BCM23550_W1D_H
7#define __BCM23550_W1D_H
8
9#include <linux/sizes.h>
10#include <asm/arch/sysmap.h>
11
12/* CPU, chip, mach, etc */
13#define CONFIG_KONA
14#define CONFIG_SKIP_LOWLEVEL_INIT
15#define CONFIG_KONA_RESET_S
16
17/*
18 * Memory configuration
19 */
Steve Rae45f2c702016-06-02 15:10:56 -070020
21#define CONFIG_SYS_SDRAM_BASE 0x80000000
22#define CONFIG_SYS_SDRAM_SIZE 0x20000000
Steve Rae45f2c702016-06-02 15:10:56 -070023
24#define CONFIG_SYS_MALLOC_LEN SZ_4M /* see armv7/start.S. */
Steve Rae45f2c702016-06-02 15:10:56 -070025
26/* GPIO Driver */
27#define CONFIG_KONA_GPIO
28
29/* MMC/SD Driver */
Steve Rae45f2c702016-06-02 15:10:56 -070030#define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR
31#define CONFIG_SYS_SDIO_BASE1 SDIO2_BASE_ADDR
32#define CONFIG_SYS_SDIO_BASE2 SDIO3_BASE_ADDR
33#define CONFIG_SYS_SDIO_BASE3 SDIO4_BASE_ADDR
34#define CONFIG_SYS_SDIO0_MAX_CLK 48000000
35#define CONFIG_SYS_SDIO1_MAX_CLK 48000000
36#define CONFIG_SYS_SDIO2_MAX_CLK 48000000
37#define CONFIG_SYS_SDIO3_MAX_CLK 48000000
38#define CONFIG_SYS_SDIO0 "sdio1"
39#define CONFIG_SYS_SDIO1 "sdio2"
40#define CONFIG_SYS_SDIO2 "sdio3"
41#define CONFIG_SYS_SDIO3 "sdio4"
42
43/* I2C Driver */
44#define CONFIG_SYS_I2C
45#define CONFIG_SYS_I2C_KONA
46#define CONFIG_SYS_SPD_BUS_NUM 3 /* Start with PMU bus */
47#define CONFIG_SYS_MAX_I2C_BUS 4
48#define CONFIG_SYS_I2C_BASE0 BSC1_BASE_ADDR
49#define CONFIG_SYS_I2C_BASE1 BSC2_BASE_ADDR
50#define CONFIG_SYS_I2C_BASE2 BSC3_BASE_ADDR
51#define CONFIG_SYS_I2C_BASE3 PMU_BSC_BASE_ADDR
52
53/* Timer Driver */
54#define CONFIG_SYS_TIMER_RATE 32000
55#define CONFIG_SYS_TIMER_COUNTER (TIMER_BASE_ADDR + 4) /* STCLO offset */
56
57/* Init functions */
Steve Rae45f2c702016-06-02 15:10:56 -070058
59/* Some commands use this as the default load address */
60#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
61
62/* No mtest functions as recommended */
63
64/*
65 * This is the initial SP which is used only briefly for relocating the u-boot
66 * image to the top of SDRAM. After relocation u-boot moves the stack to the
67 * proper place.
68 */
69#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
70
71/* Serial Info */
72#define CONFIG_SYS_NS16550_SERIAL
73/* Post pad 3 bytes after each reg addr */
74#define CONFIG_SYS_NS16550_REG_SIZE (-4)
75#define CONFIG_SYS_NS16550_CLK 13000000
Steve Rae45f2c702016-06-02 15:10:56 -070076#define CONFIG_SYS_NS16550_COM1 0x3e000000
77
Steve Rae45f2c702016-06-02 15:10:56 -070078/* must fit into GPT:u-boot-env partition */
Steve Rae45f2c702016-06-02 15:10:56 -070079
Steve Rae45f2c702016-06-02 15:10:56 -070080/* console configuration */
81#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */
Steve Rae45f2c702016-06-02 15:10:56 -070082#define CONFIG_SYS_MAXARGS 64
83#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
84
85/*
86 * One partition type must be defined for part.c
87 * This is necessary for the fatls command to work on an SD card
88 * for example.
89 */
Steve Rae45f2c702016-06-02 15:10:56 -070090
91/* version string, parser, etc */
Steve Rae45f2c702016-06-02 15:10:56 -070092
Steve Rae45f2c702016-06-02 15:10:56 -070093/* Initial upstream - boot to cmd prompt only */
94#define CONFIG_BOOTCOMMAND ""
95
Steve Rae45f2c702016-06-02 15:10:56 -070096#define CONFIG_USBID_ADDR 0x34052c46
97
Steve Rae45f2c702016-06-02 15:10:56 -070098#define CONFIG_SYS_L2CACHE_OFF
99
100#endif /* __BCM23550_W1D_H */