Priyanka Jain | 8b1a60e | 2013-10-18 17:19:06 +0530 | [diff] [blame] | 1 | Overview |
| 2 | -------- |
| 3 | The T1040RDB is a Freescale reference board that hosts the T1040 SoC |
| 4 | (and variants). Variants inclued T1042 presonality of T1040, in which |
| 5 | case T1040RDB can also be called T1042RDB. |
| 6 | |
Priyanka Jain | c42c989 | 2013-10-18 17:19:23 +0530 | [diff] [blame^] | 7 | The T1042RDB_PI is a Freescale reference board that hosts the T1042 SoC. |
| 8 | (a personality of T1040 SoC). The board is similar to T1040RDB but is |
| 9 | designed specially with low power features targeted for Printing Image Market. |
| 10 | |
Priyanka Jain | 8b1a60e | 2013-10-18 17:19:06 +0530 | [diff] [blame] | 11 | T1040 SoC Overview |
| 12 | ------------------ |
| 13 | The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA |
| 14 | processor cores with high-performance data path acceleration architecture |
| 15 | and network peripheral interfaces required for networking & telecommunications. |
| 16 | |
| 17 | The T1040/T1042 SoC includes the following function and features: |
| 18 | |
| 19 | - Four e5500 cores, each with a private 256 KB L2 cache |
| 20 | - 256 KB shared L3 CoreNet platform cache (CPC) |
| 21 | - Interconnect CoreNet platform |
| 22 | - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving |
| 23 | support |
| 24 | - Data Path Acceleration Architecture (DPAA) incorporating acceleration |
| 25 | for the following functions: |
| 26 | - Packet parsing, classification, and distribution |
| 27 | - Queue management for scheduling, packet sequencing, and congestion |
| 28 | management |
| 29 | - Cryptography Acceleration (SEC 5.0) |
| 30 | - RegEx Pattern Matching Acceleration (PME 2.2) |
| 31 | - IEEE Std 1588 support |
| 32 | - Hardware buffer management for buffer allocation and deallocation |
| 33 | - Ethernet interfaces |
| 34 | - Integrated 8-port Gigabit Ethernet switch (T1040 only) |
| 35 | - Four 1 Gbps Ethernet controllers |
| 36 | - Two RGMII interfaces or one RGMII and one MII interfaces |
| 37 | - High speed peripheral interfaces |
| 38 | - Four PCI Express 2.0 controllers running at up to 5 GHz |
| 39 | - Two SATA controllers supporting 1.5 and 3.0 Gb/s operation |
| 40 | - Upto two QSGMII interface |
| 41 | - Upto six SGMII interface supporting 1000 Mbps |
| 42 | - One SGMII interface supporting upto 2500 Mbps |
| 43 | - Additional peripheral interfaces |
| 44 | - Two USB 2.0 controllers with integrated PHY |
| 45 | - SD/eSDHC/eMMC |
| 46 | - eSPI controller |
| 47 | - Four I2C controllers |
| 48 | - Four UARTs |
| 49 | - Four GPIO controllers |
| 50 | - Integrated flash controller (IFC) |
| 51 | - LCD and HDMI interface (DIU) with 12 bit dual data rate |
| 52 | - TDM interface |
| 53 | - Multicore programmable interrupt controller (PIC) |
| 54 | - Two 8-channel DMA engines |
| 55 | - Single source clocking implementation |
| 56 | - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB) |
| 57 | |
| 58 | T1040 SoC Personalities |
| 59 | ------------------------- |
| 60 | |
| 61 | T1022 Personality: |
| 62 | T1022 is a reduced personality of T1040 with less core/clusters. |
| 63 | |
| 64 | T1042 Personality: |
| 65 | T1042 is a reduced personality of T1040 without Integrated 8-port Gigabit |
| 66 | Ethernet switch. Rest of the blocks are same as T1040 |
| 67 | |
| 68 | |
| 69 | T1040RDB board Overview |
| 70 | ------------------------- |
| 71 | - SERDES Connections, 8 lanes information: |
| 72 | 1: None |
| 73 | 2: SGMII |
| 74 | 3: QSGMII |
| 75 | 4: QSGMII |
| 76 | 5: PCIe1 x1 slot |
| 77 | 6: mini PCIe connector |
| 78 | 7: mini PCIe connector |
| 79 | 8: SATA connector |
| 80 | - DDR Controller |
| 81 | - Supports rates of up to 1600 MHz data-rate |
| 82 | - Supports one DDR3LP UDIMM/RDIMMs, of single-, dual- or quad-rank types. |
| 83 | - IFC/Local Bus |
| 84 | - NAND flash: 1GB 8-bit NAND flash |
| 85 | - NOR: 128MB 16-bit NOR Flash |
| 86 | - Ethernet |
| 87 | - Two on-board RGMII 10/100/1G ethernet ports. |
| 88 | - CPLD |
| 89 | - Clocks |
| 90 | - System and DDR clock (SYSCLK, “DDRCLK”) |
| 91 | - SERDES clocks |
Priyanka Jain | c42c989 | 2013-10-18 17:19:23 +0530 | [diff] [blame^] | 92 | - Power Supplies |
| 93 | - USB |
| 94 | - Supports two USB 2.0 ports with integrated PHYs |
| 95 | - Two type A ports with 5V@1.5A per port. |
| 96 | - SDHC |
| 97 | - SDHC/SDXC connector |
| 98 | - SPI |
| 99 | - On-board 64MB SPI flash |
| 100 | - Other IO |
| 101 | - Two Serial ports |
| 102 | - Four I2C ports |
| 103 | |
| 104 | T1042RDB_PI board Overview |
| 105 | ------------------------- |
| 106 | - SERDES Connections, 8 lanes information: |
| 107 | 1, 2, 3, 4 : PCIe x4 slot |
| 108 | 5: mini PCIe connector |
| 109 | 6: mini PCIe connector |
| 110 | 7: NA |
| 111 | 8: SATA connector |
| 112 | - DDR Controller |
| 113 | - Supports rates of up to 1600 MHz data-rate |
| 114 | - Supports one DDR3LP UDIMM/RDIMMs, of single-, dual- or quad-rank types. |
| 115 | - IFC/Local Bus |
| 116 | - NAND flash: 1GB 8-bit NAND flash |
| 117 | - NOR: 128MB 16-bit NOR Flash |
| 118 | - Ethernet |
| 119 | - Two on-board RGMII 10/100/1G ethernet ports. |
| 120 | - CPLD |
| 121 | - Clocks |
| 122 | - System and DDR clock (SYSCLK, “DDRCLK”) |
| 123 | - SERDES clocks |
| 124 | - Video |
| 125 | - DIU supports video at up to 1280x1024x32bpp |
Priyanka Jain | 8b1a60e | 2013-10-18 17:19:06 +0530 | [diff] [blame] | 126 | - Power Supplies |
| 127 | - USB |
| 128 | - Supports two USB 2.0 ports with integrated PHYs |
| 129 | - Two type A ports with 5V@1.5A per port. |
| 130 | - SDHC |
| 131 | - SDHC/SDXC connector |
| 132 | - SPI |
| 133 | - On-board 64MB SPI flash |
| 134 | - Other IO |
| 135 | - Two Serial ports |
| 136 | - Four I2C ports |
| 137 | |
| 138 | Memory map |
| 139 | ----------- |
| 140 | The addresses in brackets are physical addresses. |
| 141 | |
| 142 | Start Address End Address Description Size |
| 143 | 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB |
| 144 | 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB |
| 145 | 0xF_FE00_0000 0xF_FEFF_FFFF CCSRBAR 16MB |
| 146 | 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB |
| 147 | 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB |
| 148 | 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB |
| 149 | 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB |
| 150 | 0xF_F600_0000 0xF_F7FF_FFFF Queue manager software portal 32MB |
| 151 | 0xF_F400_0000 0xF_F5FF_FFFF Buffer manager software portal 32MB |
| 152 | 0xF_E800_0000 0xF_EFFF_FFFF IFC - NOR Flash 128MB |
| 153 | 0xF_0000_0000 0xF_003F_FFFF DCSR 4MB |
| 154 | 0xC_3000_0000 0xC_3FFF_FFFF PCI Express 4 Mem Space 256MB |
| 155 | 0xC_2000_0000 0xC_2FFF_FFFF PCI Express 3 Mem Space 256MB |
| 156 | 0xC_1000_0000 0xC_1FFF_FFFF PCI Express 2 Mem Space 256MB |
| 157 | 0xC_0000_0000 0xC_0FFF_FFFF PCI Express 1 Mem Space 256MB |
| 158 | 0x0_0000_0000 0x0_ffff_ffff DDR 2GB |
| 159 | |
| 160 | |
| 161 | NOR Flash memory Map |
| 162 | --------------------- |
| 163 | Start End Definition Size |
| 164 | 0xEFF80000 0xEFFFFFFF u-boot (current bank) 512KB |
| 165 | 0xEFF60000 0xEFF7FFFF u-boot env (current bank) 128KB |
| 166 | 0xEFF40000 0xEFF5FFFF FMAN Ucode (current bank) 128KB |
| 167 | 0xED300000 0xEFF3FFFF rootfs (alt bank) 44MB + 256KB |
| 168 | 0xEC800000 0xEC8FFFF Hardware device tree (alt bank) 1MB |
| 169 | 0xEC020000 0xEC7FFFFF Linux.uImage (alt bank) 7MB + 875KB |
| 170 | 0xEC000000 0xEC01FFFF RCW (alt bank) 128KB |
| 171 | 0xEBF80000 0xEBFFFFFF u-boot (alt bank) 512KB |
| 172 | 0xEBF60000 0xEBF7FFFF u-boot env (alt bank) 128KB |
| 173 | 0xEBF40000 0xEBF5FFFF FMAN ucode (alt bank) 128KB |
| 174 | 0xE9300000 0xEBF3FFFF rootfs (current bank) 44MB + 256KB |
| 175 | 0xE8800000 0xE88FFFFF Hardware device tree (cur bank) 11MB + 512KB |
| 176 | 0xE8020000 0xE86FFFFF Linux.uImage (current bank) 7MB + 875KB |
| 177 | 0xE8000000 0xE801FFFF RCW (current bank) 128KB |
| 178 | |
| 179 | |
| 180 | Various Software configurations/environment variables/commands |
| 181 | -------------------------------------------------------------- |
| 182 | The below commands apply to the board |
| 183 | |
| 184 | 1. U-boot environment variable hwconfig |
| 185 | The default hwconfig is: |
| 186 | hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=cs0_cs1;usb1: |
| 187 | dr_mode=host,phy_type=utmi |
| 188 | Note: For USB gadget set "dr_mode=peripheral" |
| 189 | |
| 190 | 2. FMAN Ucode versions |
| 191 | fsl_fman_ucode_t1040.bin |
| 192 | |
| 193 | 3. Switching to alternate bank |
| 194 | Commands for switching to alternate bank. |
| 195 | |
| 196 | 1. To change from vbank0 to vbank4 |
| 197 | => qixis_reset altbank (it will boot using vbank4) |
| 198 | |
| 199 | 2.To change from vbank4 to vbank0 |
| 200 | => qixis reset (it will boot using vbank0) |