Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Peter Chubb | 441f238 | 2016-08-30 22:54:46 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (c) Copyright 2016, Data61 |
| 4 | * Commonwealth Scientific and Industrial Research Organisation (CSIRO) |
| 5 | * |
| 6 | * Based on jetson-tk1.h which is: |
| 7 | * (C) Copyright 2013-2014 |
| 8 | * NVIDIA Corporation <www.nvidia.com> |
Peter Chubb | 441f238 | 2016-08-30 22:54:46 +0000 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #ifndef __CONFIG_H |
| 12 | #define __CONFIG_H |
| 13 | |
| 14 | #include <linux/sizes.h> |
| 15 | |
Peter Chubb | 441f238 | 2016-08-30 22:54:46 +0000 | [diff] [blame] | 16 | #include "tegra124-common.h" |
| 17 | |
| 18 | /* High-level configuration options */ |
| 19 | #define CONFIG_TEGRA_BOARD_STRING "CEI tk1-som" |
| 20 | |
| 21 | /* Board-specific serial config */ |
| 22 | #define CONFIG_TEGRA_ENABLE_UARTD |
| 23 | #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE |
| 24 | |
Peter Chubb | 441f238 | 2016-08-30 22:54:46 +0000 | [diff] [blame] | 25 | /* SPI */ |
Peter Chubb | 441f238 | 2016-08-30 22:54:46 +0000 | [diff] [blame] | 26 | #define CONFIG_SPI_FLASH_SIZE (4 << 20) |
| 27 | |
Peter Chubb | 441f238 | 2016-08-30 22:54:46 +0000 | [diff] [blame] | 28 | #include "tegra-common-usb-gadget.h" |
| 29 | #include "tegra-common-post.h" |
| 30 | |
| 31 | #define CONFIG_ARMV7_PSCI 1 |
| 32 | #define CONFIG_ARMV7_PSCI_NR_CPUS 4 |
| 33 | /* Reserve top 1M for secure RAM */ |
| 34 | #define CONFIG_ARMV7_SECURE_BASE 0xfff00000 |
| 35 | #define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000 |
| 36 | |
| 37 | #endif /* __CONFIG_H */ |