Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2013 Atmel Corporation |
| 4 | * Bo Shen <voice.shen@atmel.com> |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <asm/io.h> |
| 9 | #include <asm/arch/at91_common.h> |
| 10 | #include <asm/arch/at91_pit.h> |
| 11 | #include <asm/arch/at91_pmc.h> |
| 12 | #include <asm/arch/at91_rstc.h> |
| 13 | #include <asm/arch/at91_wdt.h> |
| 14 | #include <asm/arch/clk.h> |
| 15 | #include <spl.h> |
| 16 | |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 17 | static void switch_to_main_crystal_osc(void) |
| 18 | { |
| 19 | struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; |
| 20 | u32 tmp; |
| 21 | |
| 22 | tmp = readl(&pmc->mor); |
| 23 | tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff); |
| 24 | tmp &= ~AT91_PMC_MOR_KEY(0xff); |
| 25 | tmp |= AT91_PMC_MOR_MOSCEN; |
| 26 | tmp |= AT91_PMC_MOR_OSCOUNT(8); |
| 27 | tmp |= AT91_PMC_MOR_KEY(0x37); |
| 28 | writel(tmp, &pmc->mor); |
| 29 | while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS)) |
| 30 | ; |
| 31 | |
Wenyou Yang | f5fb545 | 2017-09-13 14:58:48 +0800 | [diff] [blame] | 32 | #if defined(CONFIG_SAMA5D2) |
| 33 | /* Enable a measurement of the external oscillator */ |
| 34 | tmp = readl(&pmc->mcfr); |
| 35 | tmp |= AT91_PMC_MCFR_CCSS_XTAL_OSC; |
| 36 | tmp |= AT91_PMC_MCFR_RCMEAS; |
| 37 | writel(tmp, &pmc->mcfr); |
| 38 | |
| 39 | while (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINRDY)) |
| 40 | ; |
| 41 | |
| 42 | if (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINF_MASK)) |
| 43 | hang(); |
| 44 | #endif |
| 45 | |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 46 | tmp = readl(&pmc->mor); |
| 47 | tmp &= ~AT91_PMC_MOR_OSCBYPASS; |
| 48 | tmp &= ~AT91_PMC_MOR_KEY(0xff); |
| 49 | tmp |= AT91_PMC_MOR_KEY(0x37); |
| 50 | writel(tmp, &pmc->mor); |
| 51 | |
| 52 | tmp = readl(&pmc->mor); |
| 53 | tmp |= AT91_PMC_MOR_MOSCSEL; |
| 54 | tmp &= ~AT91_PMC_MOR_KEY(0xff); |
| 55 | tmp |= AT91_PMC_MOR_KEY(0x37); |
| 56 | writel(tmp, &pmc->mor); |
| 57 | |
| 58 | while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS)) |
| 59 | ; |
| 60 | |
Wenyou Yang | f5fb545 | 2017-09-13 14:58:48 +0800 | [diff] [blame] | 61 | #if !defined(CONFIG_SAMA5D2) |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 62 | /* Wait until MAINRDY field is set to make sure main clock is stable */ |
| 63 | while (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY)) |
| 64 | ; |
Wenyou Yang | f5fb545 | 2017-09-13 14:58:48 +0800 | [diff] [blame] | 65 | #endif |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 66 | |
Wenyou Yang | f5fb545 | 2017-09-13 14:58:48 +0800 | [diff] [blame] | 67 | #if !defined(CONFIG_SAMA5D4) && !defined(CONFIG_SAMA5D2) |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 68 | tmp = readl(&pmc->mor); |
| 69 | tmp &= ~AT91_PMC_MOR_MOSCRCEN; |
| 70 | tmp &= ~AT91_PMC_MOR_KEY(0xff); |
| 71 | tmp |= AT91_PMC_MOR_KEY(0x37); |
| 72 | writel(tmp, &pmc->mor); |
Bo Shen | 73864b1 | 2014-12-15 13:24:32 +0800 | [diff] [blame] | 73 | #endif |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 74 | } |
| 75 | |
Bo Shen | 7dc2dbd | 2014-12-15 13:24:30 +0800 | [diff] [blame] | 76 | __weak void matrix_init(void) |
| 77 | { |
| 78 | /* This only be used for sama5d4 soc now */ |
| 79 | } |
| 80 | |
Bo Shen | 0a91028 | 2014-12-15 13:24:31 +0800 | [diff] [blame] | 81 | __weak void redirect_int_from_saic_to_aic(void) |
| 82 | { |
| 83 | /* This only be used for sama5d4 soc now */ |
| 84 | } |
| 85 | |
Tom Rini | d9eae55 | 2015-02-10 19:07:22 -0500 | [diff] [blame] | 86 | /* empty stub to satisfy current lowlevel_init, can be removed any time */ |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 87 | void s_init(void) |
| 88 | { |
Tom Rini | d9eae55 | 2015-02-10 19:07:22 -0500 | [diff] [blame] | 89 | } |
| 90 | |
| 91 | void board_init_f(ulong dummy) |
| 92 | { |
Wenyou Yang | f13d0ff | 2017-03-24 11:34:04 +0800 | [diff] [blame] | 93 | int ret; |
| 94 | |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 95 | switch_to_main_crystal_osc(); |
| 96 | |
Samuel Mescoff | c3156fc | 2016-02-16 09:45:06 +0100 | [diff] [blame] | 97 | #ifdef CONFIG_SAMA5D2 |
| 98 | configure_2nd_sram_as_l2_cache(); |
| 99 | #endif |
| 100 | |
Tom Rini | 4a2b61b | 2018-05-10 07:15:52 -0400 | [diff] [blame] | 101 | #if !defined(CONFIG_AT91SAM9_WATCHDOG) |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 102 | /* disable watchdog */ |
| 103 | at91_disable_wdt(); |
Tom Rini | 4a2b61b | 2018-05-10 07:15:52 -0400 | [diff] [blame] | 104 | #endif |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 105 | |
| 106 | /* PMC configuration */ |
| 107 | at91_pmc_init(); |
| 108 | |
| 109 | at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); |
| 110 | |
Bo Shen | 7dc2dbd | 2014-12-15 13:24:30 +0800 | [diff] [blame] | 111 | matrix_init(); |
| 112 | |
Bo Shen | 0a91028 | 2014-12-15 13:24:31 +0800 | [diff] [blame] | 113 | redirect_int_from_saic_to_aic(); |
| 114 | |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 115 | timer_init(); |
| 116 | |
| 117 | board_early_init_f(); |
| 118 | |
Wenyou Yang | ac8af4c | 2017-03-24 11:34:05 +0800 | [diff] [blame] | 119 | mem_init(); |
| 120 | |
Wenyou Yang | f13d0ff | 2017-03-24 11:34:04 +0800 | [diff] [blame] | 121 | ret = spl_init(); |
| 122 | if (ret) { |
| 123 | debug("spl_init() failed: %d\n", ret); |
| 124 | hang(); |
| 125 | } |
| 126 | |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 127 | preloader_console_init(); |
| 128 | |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 129 | } |