Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2009 Samsung Electronics |
| 3 | * Heungjun Kim <riverful.kim@samsung.com> |
| 4 | * Inki Dae <inki.dae@samsung.com> |
| 5 | * Minkyu Kang <mk7.kang@samsung.com> |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
| 26 | #include <common.h> |
| 27 | #include <asm/io.h> |
| 28 | #include <asm/arch/pwm.h> |
| 29 | #include <asm/arch/clk.h> |
| 30 | |
| 31 | #define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */ |
| 32 | #define MUX_DIV_2 1 /* 1/2 period */ |
| 33 | #define MUX_DIV_4 2 /* 1/4 period */ |
| 34 | #define MUX_DIV_8 3 /* 1/8 period */ |
| 35 | #define MUX_DIV_16 4 /* 1/16 period */ |
| 36 | #define MUX4_DIV_SHIFT 16 |
| 37 | |
| 38 | #define TCON_TIMER4_SHIFT 20 |
| 39 | |
| 40 | static unsigned long count_value; |
| 41 | |
| 42 | /* Internal tick units */ |
| 43 | static unsigned long long timestamp; /* Monotonic incrementing timer */ |
| 44 | static unsigned long lastdec; /* Last decremneter snapshot */ |
| 45 | |
| 46 | /* macro to read the 16 bit timer */ |
Minkyu Kang | 2917c0a | 2010-08-19 20:41:50 +0900 | [diff] [blame] | 47 | static inline struct s5p_timer *s5p_get_base_timer(void) |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 48 | { |
Minkyu Kang | 2917c0a | 2010-08-19 20:41:50 +0900 | [diff] [blame] | 49 | return (struct s5p_timer *)samsung_get_base_timer(); |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 50 | } |
| 51 | |
| 52 | int timer_init(void) |
| 53 | { |
Minkyu Kang | 2917c0a | 2010-08-19 20:41:50 +0900 | [diff] [blame] | 54 | struct s5p_timer *const timer = s5p_get_base_timer(); |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 55 | u32 val; |
| 56 | |
| 57 | /* |
| 58 | * @ PWM Timer 4 |
| 59 | * Timer Freq(HZ) = |
Minkyu Kang | 36f25cf | 2010-08-24 15:51:55 +0900 | [diff] [blame] | 60 | * PWM_CLK / { (prescaler_value + 1) * (divider_value) } |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 61 | */ |
| 62 | |
| 63 | /* set prescaler : 16 */ |
| 64 | /* set divider : 2 */ |
| 65 | writel((PRESCALER_1 & 0xff) << 8, &timer->tcfg0); |
| 66 | writel((MUX_DIV_2 & 0xf) << MUX4_DIV_SHIFT, &timer->tcfg1); |
| 67 | |
Minkyu Kang | c396ee1 | 2010-11-19 17:00:26 +0900 | [diff] [blame^] | 68 | /* count_value = 2085937.5(HZ) (per 1 sec)*/ |
| 69 | count_value = get_pwm_clk() / ((PRESCALER_1 + 1) * |
| 70 | (MUX_DIV_2 + 1)); |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 71 | |
Minkyu Kang | c396ee1 | 2010-11-19 17:00:26 +0900 | [diff] [blame^] | 72 | /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ |
| 73 | count_value = count_value / 100; |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 74 | |
| 75 | /* set count value */ |
| 76 | writel(count_value, &timer->tcntb4); |
| 77 | lastdec = count_value; |
| 78 | |
| 79 | val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) | |
Minkyu Kang | 2917c0a | 2010-08-19 20:41:50 +0900 | [diff] [blame] | 80 | TCON4_AUTO_RELOAD; |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 81 | |
| 82 | /* auto reload & manual update */ |
Minkyu Kang | 2917c0a | 2010-08-19 20:41:50 +0900 | [diff] [blame] | 83 | writel(val | TCON4_UPDATE, &timer->tcon); |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 84 | |
| 85 | /* start PWM timer 4 */ |
Minkyu Kang | 2917c0a | 2010-08-19 20:41:50 +0900 | [diff] [blame] | 86 | writel(val | TCON4_START, &timer->tcon); |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 87 | |
| 88 | timestamp = 0; |
| 89 | |
| 90 | return 0; |
| 91 | } |
| 92 | |
| 93 | /* |
| 94 | * timer without interrupts |
| 95 | */ |
| 96 | void reset_timer(void) |
| 97 | { |
| 98 | reset_timer_masked(); |
| 99 | } |
| 100 | |
| 101 | unsigned long get_timer(unsigned long base) |
| 102 | { |
| 103 | return get_timer_masked() - base; |
| 104 | } |
| 105 | |
| 106 | void set_timer(unsigned long t) |
| 107 | { |
| 108 | timestamp = t; |
| 109 | } |
| 110 | |
| 111 | /* delay x useconds */ |
Ingo van Lil | f0f778a | 2009-11-24 14:09:21 +0100 | [diff] [blame] | 112 | void __udelay(unsigned long usec) |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 113 | { |
Minkyu Kang | c396ee1 | 2010-11-19 17:00:26 +0900 | [diff] [blame^] | 114 | struct s5p_timer *const timer = s5p_get_base_timer(); |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 115 | unsigned long tmo, tmp; |
| 116 | |
Minkyu Kang | c396ee1 | 2010-11-19 17:00:26 +0900 | [diff] [blame^] | 117 | count_value = readl(&timer->tcntb4); |
| 118 | |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 119 | if (usec >= 1000) { |
| 120 | /* |
| 121 | * if "big" number, spread normalization |
| 122 | * to seconds |
| 123 | * 1. start to normalize for usec to ticks per sec |
| 124 | * 2. find number of "ticks" to wait to achieve target |
| 125 | * 3. finish normalize. |
| 126 | */ |
| 127 | tmo = usec / 1000; |
| 128 | tmo *= (CONFIG_SYS_HZ * count_value / 10); |
| 129 | tmo /= 1000; |
| 130 | } else { |
| 131 | /* else small number, don't kill it prior to HZ multiply */ |
| 132 | tmo = usec * CONFIG_SYS_HZ * count_value / 10; |
| 133 | tmo /= (1000 * 1000); |
| 134 | } |
| 135 | |
| 136 | /* get current timestamp */ |
| 137 | tmp = get_timer(0); |
| 138 | |
| 139 | /* if setting this fordward will roll time stamp */ |
| 140 | /* reset "advancing" timestamp to 0, set lastdec value */ |
| 141 | /* else, set advancing stamp wake up time */ |
| 142 | if ((tmo + tmp + 1) < tmp) |
| 143 | reset_timer_masked(); |
| 144 | else |
| 145 | tmo += tmp; |
| 146 | |
| 147 | /* loop till event */ |
| 148 | while (get_timer_masked() < tmo) |
| 149 | ; /* nop */ |
| 150 | } |
| 151 | |
| 152 | void reset_timer_masked(void) |
| 153 | { |
Minkyu Kang | 2917c0a | 2010-08-19 20:41:50 +0900 | [diff] [blame] | 154 | struct s5p_timer *const timer = s5p_get_base_timer(); |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 155 | |
| 156 | /* reset time */ |
| 157 | lastdec = readl(&timer->tcnto4); |
| 158 | timestamp = 0; |
| 159 | } |
| 160 | |
| 161 | unsigned long get_timer_masked(void) |
| 162 | { |
Minkyu Kang | 2917c0a | 2010-08-19 20:41:50 +0900 | [diff] [blame] | 163 | struct s5p_timer *const timer = s5p_get_base_timer(); |
Minkyu Kang | 8764998 | 2009-10-01 17:20:01 +0900 | [diff] [blame] | 164 | unsigned long now = readl(&timer->tcnto4); |
| 165 | |
| 166 | if (lastdec >= now) |
| 167 | timestamp += lastdec - now; |
| 168 | else |
| 169 | timestamp += lastdec + count_value - now; |
| 170 | |
| 171 | lastdec = now; |
| 172 | |
| 173 | return timestamp; |
| 174 | } |
| 175 | |
| 176 | /* |
| 177 | * This function is derived from PowerPC code (read timebase as long long). |
| 178 | * On ARM it just returns the timer value. |
| 179 | */ |
| 180 | unsigned long long get_ticks(void) |
| 181 | { |
| 182 | return get_timer(0); |
| 183 | } |
| 184 | |
| 185 | /* |
| 186 | * This function is derived from PowerPC code (timebase clock frequency). |
| 187 | * On ARM it returns the number of timer ticks per second. |
| 188 | */ |
| 189 | unsigned long get_tbclk(void) |
| 190 | { |
| 191 | return CONFIG_SYS_HZ; |
| 192 | } |