Icenowy Zheng | 0c01b96 | 2018-07-21 16:20:31 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz> |
| 4 | */ |
| 5 | |
| 6 | #ifndef _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_ |
| 7 | #define _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_ |
| 8 | |
| 9 | #define CLK_AR100 0 |
| 10 | |
| 11 | #define CLK_R_APB1 2 |
| 12 | |
| 13 | #define CLK_R_APB1_TIMER 4 |
| 14 | #define CLK_R_APB1_TWD 5 |
| 15 | #define CLK_R_APB1_PWM 6 |
| 16 | #define CLK_R_APB2_UART 7 |
| 17 | #define CLK_R_APB2_I2C 8 |
| 18 | #define CLK_R_APB1_IR 9 |
| 19 | #define CLK_R_APB1_W1 10 |
| 20 | |
| 21 | #define CLK_IR 11 |
| 22 | #define CLK_W1 12 |
| 23 | |
Jernej Skrabec | 415ef9b | 2021-01-11 21:11:50 +0100 | [diff] [blame] | 24 | #define CLK_R_APB2_RSB 13 |
Andre Przywara | 5eb4bbe | 2022-09-11 00:04:41 +0100 | [diff] [blame] | 25 | #define CLK_R_APB1_RTC 14 |
Jernej Skrabec | 415ef9b | 2021-01-11 21:11:50 +0100 | [diff] [blame] | 26 | |
Icenowy Zheng | 0c01b96 | 2018-07-21 16:20:31 +0800 | [diff] [blame] | 27 | #endif /* _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_ */ |