Wolfgang Denk | 4646d2a | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 1 | /** |
| 2 | * @file IxEthAccDataPlane_p.h |
| 3 | * |
| 4 | * @author Intel Corporation |
| 5 | * @date 12-Feb-2002 |
| 6 | * |
| 7 | * @brief Internal Header file for IXP425 Ethernet Access component. |
| 8 | * |
| 9 | * Design Notes: |
| 10 | * |
| 11 | * |
| 12 | * @par |
| 13 | * IXP400 SW Release version 2.0 |
| 14 | * |
| 15 | * -- Copyright Notice -- |
| 16 | * |
| 17 | * @par |
| 18 | * Copyright 2001-2005, Intel Corporation. |
| 19 | * All rights reserved. |
| 20 | * |
| 21 | * @par |
| 22 | * Redistribution and use in source and binary forms, with or without |
| 23 | * modification, are permitted provided that the following conditions |
| 24 | * are met: |
| 25 | * 1. Redistributions of source code must retain the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer. |
| 27 | * 2. Redistributions in binary form must reproduce the above copyright |
| 28 | * notice, this list of conditions and the following disclaimer in the |
| 29 | * documentation and/or other materials provided with the distribution. |
| 30 | * 3. Neither the name of the Intel Corporation nor the names of its contributors |
| 31 | * may be used to endorse or promote products derived from this software |
| 32 | * without specific prior written permission. |
| 33 | * |
| 34 | * @par |
| 35 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' |
| 36 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 37 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 38 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE |
| 39 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 40 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 41 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 42 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 43 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 44 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 45 | * SUCH DAMAGE. |
| 46 | * |
| 47 | * @par |
| 48 | * -- End of Copyright Notice -- |
| 49 | */ |
| 50 | |
| 51 | |
| 52 | |
| 53 | #ifndef IxEthAccDataPlane_p_H |
| 54 | #define IxEthAccDataPlane_p_H |
| 55 | |
| 56 | #include <IxOsal.h> |
| 57 | #include <IxQMgr.h> |
| 58 | |
| 59 | /** |
| 60 | * @addtogroup IxEthAccPri |
| 61 | *@{ |
| 62 | */ |
| 63 | |
| 64 | /* typedefs global to this file*/ |
| 65 | |
| 66 | typedef struct |
| 67 | { |
| 68 | IX_OSAL_MBUF *pHead; |
| 69 | IX_OSAL_MBUF *pTail; |
| 70 | }IxEthAccDataPlaneQList; |
| 71 | |
| 72 | |
| 73 | /** |
| 74 | * @struct IxEthAccDataPlaneStats |
| 75 | * @brief Statistics data structure associated with the data plane |
| 76 | * |
| 77 | */ |
| 78 | typedef struct |
| 79 | { |
| 80 | UINT32 addToSwQ; |
| 81 | UINT32 removeFromSwQ; |
| 82 | UINT32 unchainedTxMBufs; |
| 83 | UINT32 chainedTxMBufs; |
| 84 | UINT32 unchainedTxDoneMBufs; |
| 85 | UINT32 chainedTxDoneMBufs; |
| 86 | UINT32 unchainedRxMBufs; |
| 87 | UINT32 chainedRxMBufs; |
| 88 | UINT32 unchainedRxFreeMBufs; |
| 89 | UINT32 chainedRxFreeMBufs; |
| 90 | UINT32 rxCallbackCounter; |
| 91 | UINT32 rxCallbackBurstRead; |
| 92 | UINT32 txDoneCallbackCounter; |
| 93 | UINT32 unexpectedError; |
| 94 | } IxEthAccDataPlaneStats; |
| 95 | |
| 96 | /** |
| 97 | * @fn ixEthAccMbufFromSwQ |
| 98 | * @brief used during disable steps to convert mbufs from |
| 99 | * swq format, ready to be pushed into hw queues for NPE, |
| 100 | * back into XScale format |
| 101 | */ |
| 102 | IX_OSAL_MBUF *ixEthAccMbufFromSwQ(IX_OSAL_MBUF *mbuf); |
| 103 | |
| 104 | /** |
| 105 | * @fn ixEthAccDataPlaneShow |
| 106 | * @brief Show function (for data plane statistics |
| 107 | */ |
| 108 | void ixEthAccDataPlaneShow(void); |
| 109 | |
| 110 | /* |
| 111 | * lock dataplane when atomic operation is required |
| 112 | */ |
| 113 | #define IX_ETH_ACC_DATA_PLANE_LOCK(arg) arg = ixOsalIrqLock(); |
| 114 | #define IX_ETH_ACC_DATA_PLANE_UNLOCK(arg) ixOsalIrqUnlock(arg); |
| 115 | |
| 116 | /* |
| 117 | * Use MBUF fields |
| 118 | */ |
| 119 | #define IX_ETHACC_NE_SHARED(mBufPtr) \ |
| 120 | ((IxEthAccNe *)&((mBufPtr)->ix_ne)) |
| 121 | |
| 122 | #if 1 |
| 123 | |
| 124 | #define IX_ETHACC_NE_NEXT(mBufPtr) (mBufPtr)->ix_ne.reserved[0] |
| 125 | |
| 126 | /* tm - wrong!! len and pkt_len are in the second word - #define IX_ETHACC_NE_LEN(mBufPtr) (mBufPtr)->ix_ne.reserved[3] */ |
| 127 | #define IX_ETHACC_NE_LEN(mBufPtr) (mBufPtr)->ix_ne.reserved[1] |
| 128 | |
| 129 | #define IX_ETHACC_NE_DATA(mBufPtr)(mBufPtr)->ix_ne.reserved[2] |
| 130 | |
| 131 | #else |
| 132 | |
| 133 | #define IX_ETHACC_NE_NEXT(mBufPtr) \ |
| 134 | IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_next |
| 135 | |
| 136 | #define IX_ETHACC_NE_LEN(mBufPtr) \ |
| 137 | IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_lengths |
| 138 | |
| 139 | #define IX_ETHACC_NE_DATA(mBufPtr) \ |
| 140 | IX_ETHACC_NE_SHARED(mBufPtr)->ixReserved_data |
| 141 | #endif |
| 142 | |
| 143 | /* |
| 144 | * Use MBUF next pointer field to chain data. |
| 145 | */ |
| 146 | #define IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER(mbuf) (mbuf)->ix_ctrl.ix_chain |
| 147 | |
| 148 | |
| 149 | |
| 150 | #define IX_ETH_ACC_DATAPLANE_IS_Q_EMPTY(mbuf_list) ((mbuf_list.pHead) == NULL) |
| 151 | |
| 152 | |
| 153 | #define IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_HEAD(mbuf_list,mbuf_to_add) \ |
| 154 | do { \ |
| 155 | int lockVal; \ |
| 156 | IX_ETH_ACC_DATA_PLANE_LOCK(lockVal); \ |
| 157 | IX_ETH_ACC_STATS_INC(ixEthAccDataStats.addToSwQ); \ |
| 158 | if ( (mbuf_list.pHead) != NULL ) \ |
| 159 | { \ |
| 160 | (IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add))) = (mbuf_list.pHead);\ |
| 161 | (mbuf_list.pHead) = (mbuf_to_add); \ |
| 162 | } \ |
| 163 | else { \ |
| 164 | (mbuf_list.pTail) = (mbuf_list.pHead) = (mbuf_to_add); \ |
| 165 | IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add)) = NULL; \ |
| 166 | } \ |
| 167 | IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal); \ |
| 168 | } while(0) |
| 169 | |
| 170 | |
| 171 | #define IX_ETH_ACC_DATAPLANE_ADD_MBUF_TO_Q_TAIL(mbuf_list,mbuf_to_add) \ |
| 172 | do { \ |
| 173 | int lockVal; \ |
| 174 | IX_ETH_ACC_DATA_PLANE_LOCK(lockVal); \ |
| 175 | IX_ETH_ACC_STATS_INC(ixEthAccDataStats.addToSwQ); \ |
| 176 | if ( (mbuf_list.pHead) == NULL ) \ |
| 177 | { \ |
| 178 | (mbuf_list.pHead) = mbuf_to_add; \ |
| 179 | IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add)) = NULL; \ |
| 180 | } \ |
| 181 | else { \ |
| 182 | IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_list.pTail)) = (mbuf_to_add); \ |
| 183 | IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_add)) = NULL; \ |
| 184 | } \ |
| 185 | (mbuf_list.pTail) = mbuf_to_add; \ |
| 186 | IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal); \ |
| 187 | } while (0) |
| 188 | |
| 189 | |
| 190 | #define IX_ETH_ACC_DATAPLANE_REMOVE_MBUF_FROM_Q_HEAD(mbuf_list,mbuf_to_rem) \ |
| 191 | do { \ |
| 192 | int lockVal; \ |
| 193 | IX_ETH_ACC_DATA_PLANE_LOCK(lockVal); \ |
| 194 | if ( (mbuf_list.pHead) != NULL ) \ |
| 195 | { \ |
| 196 | IX_ETH_ACC_STATS_INC(ixEthAccDataStats.removeFromSwQ); \ |
| 197 | (mbuf_to_rem) = (mbuf_list.pHead) ; \ |
| 198 | (mbuf_list.pHead) = (IX_ETH_ACC_MBUF_NEXT_PKT_CHAIN_MEMBER((mbuf_to_rem)));\ |
| 199 | } \ |
| 200 | else { \ |
| 201 | (mbuf_to_rem) = NULL; \ |
| 202 | } \ |
| 203 | IX_ETH_ACC_DATA_PLANE_UNLOCK(lockVal); \ |
| 204 | } while (0) |
| 205 | |
| 206 | |
| 207 | /** |
| 208 | * @brief message handler QManager entries for NPE id => port ID conversion (NPE_B => 0, NPE_C => 1) |
| 209 | */ |
| 210 | #define IX_ETH_ACC_PORT_TO_NPE_ID(port) \ |
| 211 | ixEthAccPortData[(port)].npeId |
| 212 | |
| 213 | #define IX_ETH_ACC_NPE_TO_PORT_ID(npe) ((npe == 0 ? 2 : (npe == 1 ? 0 : ( npe == 2 ? 1 : -1 )))) |
| 214 | |
| 215 | #define IX_ETH_ACC_PORT_TO_TX_Q_ID(port) \ |
| 216 | ixEthAccPortData[(port)].ixEthAccTxData.txQueue |
| 217 | |
| 218 | #define IX_ETH_ACC_PORT_TO_RX_FREE_Q_ID(port) \ |
| 219 | ixEthAccPortData[(port)].ixEthAccRxData.rxFreeQueue |
| 220 | |
| 221 | #define IX_ETH_ACC_PORT_TO_TX_Q_SOURCE(port) (port == IX_ETH_PORT_1 ? IX_ETH_ACC_TX_FRAME_ENET0_Q_SOURCE : (port == IX_ETH_PORT_2 ? IX_ETH_ACC_TX_FRAME_ENET1_Q_SOURCE : IX_ETH_ACC_TX_FRAME_ENET2_Q_SOURCE)) |
| 222 | |
| 223 | #define IX_ETH_ACC_PORT_TO_RX_FREE_Q_SOURCE(port) (port == IX_ETH_PORT_1 ? IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q_SOURCE : (port == IX_ETH_PORT_2 ? IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q_SOURCE : IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q_SOURCE )) |
| 224 | |
| 225 | /* Flush the mbufs chain and all data pointed to by the mbuf */ |
| 226 | |
| 227 | #ifndef NDEBUG |
| 228 | #define IX_ETH_ACC_STATS_INC(x) (x++) |
| 229 | #else |
| 230 | #define IX_ETH_ACC_STATS_INC(x) |
| 231 | #endif |
| 232 | |
| 233 | #define IX_ETH_ACC_MAX_TX_FRAMES_TO_SUBMIT 128 |
| 234 | |
| 235 | void ixEthRxFrameQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId); |
| 236 | void ixEthRxMultiBufferQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId); |
| 237 | void ixEthTxFrameDoneQMCallback(IxQMgrQId qId, IxQMgrCallbackId callbackId); |
| 238 | |
| 239 | #endif /* IxEthAccDataPlane_p_H */ |
| 240 | |
| 241 | |
| 242 | /** |
| 243 | *@} |
| 244 | */ |
| 245 | |