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Marek Vasut163551a2010-05-11 04:31:44 +02001/*
2 * Toradex Colibri PXA270 Support
3 *
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
Marcel Ziswilerd92dee52016-11-16 17:49:23 +01005 * Copyright (C) 2016 Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marek Vasut163551a2010-05-11 04:31:44 +02006 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Marek Vasut163551a2010-05-11 04:31:44 +02008 */
9
10#include <common.h>
Simon Glass11c89f32017-05-17 17:18:03 -060011#include <dm.h>
Marek Vasut163551a2010-05-11 04:31:44 +020012#include <asm/arch/hardware.h>
Marek Vasut71d058b2011-11-26 11:17:32 +010013#include <asm/arch/pxa.h>
Marcel Ziswiler15fc2722016-11-14 21:40:28 +010014#include <asm/arch/regs-mmc.h>
15#include <asm/arch/regs-uart.h>
Marek Vasut2db1e962010-09-09 09:50:39 +020016#include <asm/io.h>
Marcel Ziswiler15fc2722016-11-14 21:40:28 +010017#include <dm/platdata.h>
18#include <dm/platform_data/serial_pxa.h>
19#include <netdev.h>
Marek Vasute326a232011-11-26 07:15:36 +010020#include <serial.h>
Mateusz Zalegad862f892013-10-04 19:22:26 +020021#include <usb.h>
Simon Glass0ffb9d62017-05-31 19:47:48 -060022#include <asm/mach-types.h>
Stefan Agner98ffd0f2016-11-30 13:41:53 -080023#include "../common/tdx-common.h"
Marek Vasut163551a2010-05-11 04:31:44 +020024
25DECLARE_GLOBAL_DATA_PTR;
26
Marek Vasute326a232011-11-26 07:15:36 +010027int board_init(void)
Marek Vasut163551a2010-05-11 04:31:44 +020028{
Marek Vasut20212992010-10-20 20:15:11 +020029 /* We have RAM, disable cache */
30 dcache_disable();
31 icache_disable();
Marek Vasut163551a2010-05-11 04:31:44 +020032
Marcel Ziswilerb7063652015-03-01 00:53:08 +010033 /* arch number of Toradex Colibri PXA270 */
Marek Vasut163551a2010-05-11 04:31:44 +020034 gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
35
36 /* adress of boot parameters */
37 gd->bd->bi_boot_params = 0xa0000100;
38
39 return 0;
40}
41
Marcel Ziswilerd92dee52016-11-16 17:49:23 +010042int checkboard(void)
43{
44 puts("Model: Toradex Colibri PXA270\n");
45
46 return 0;
47}
48
Stefan Agner98ffd0f2016-11-30 13:41:53 -080049#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
50int ft_board_setup(void *blob, bd_t *bd)
51{
52 return ft_common_board_setup(blob, bd);
53}
54#endif
55
Marek Vasut20212992010-10-20 20:15:11 +020056int dram_init(void)
Marek Vasut163551a2010-05-11 04:31:44 +020057{
Marek Vasut08341be2011-11-26 11:18:57 +010058 pxa2xx_dram_init();
Marek Vasut20212992010-10-20 20:15:11 +020059 gd->ram_size = PHYS_SDRAM_1_SIZE;
60 return 0;
61}
Marek Vasut163551a2010-05-11 04:31:44 +020062
Marek Vasut163551a2010-05-11 04:31:44 +020063#ifdef CONFIG_CMD_USB
Troy Kiskyde8ae7b2013-10-10 15:27:55 -070064int board_usb_init(int index, enum usb_init_type init)
Marek Vasut163551a2010-05-11 04:31:44 +020065{
Marek Vasut2db1e962010-09-09 09:50:39 +020066 writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
67 ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
68 UHCHR);
Marek Vasut163551a2010-05-11 04:31:44 +020069
Marek Vasut2db1e962010-09-09 09:50:39 +020070 writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
Marek Vasut163551a2010-05-11 04:31:44 +020071
Marek Vasute326a232011-11-26 07:15:36 +010072 while (UHCHR & UHCHR_FSBIR)
73 ;
Marek Vasut163551a2010-05-11 04:31:44 +020074
Marek Vasut2db1e962010-09-09 09:50:39 +020075 writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
76 writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
Marek Vasut163551a2010-05-11 04:31:44 +020077
78 /* Clear any OTG Pin Hold */
Marek Vasut2db1e962010-09-09 09:50:39 +020079 if (readl(PSSR) & PSSR_OTGPH)
80 writel(readl(PSSR) | PSSR_OTGPH, PSSR);
Marek Vasut163551a2010-05-11 04:31:44 +020081
Marek Vasut2db1e962010-09-09 09:50:39 +020082 writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
83 writel(readl(UHCRHDA) | 0x100, UHCRHDA);
Marek Vasut163551a2010-05-11 04:31:44 +020084
85 /* Set port power control mask bits, only 3 ports. */
Marek Vasut2db1e962010-09-09 09:50:39 +020086 writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
Marek Vasut163551a2010-05-11 04:31:44 +020087
88 /* enable port 2 */
Marek Vasut2db1e962010-09-09 09:50:39 +020089 writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
90 UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
Marek Vasut163551a2010-05-11 04:31:44 +020091
92 return 0;
93}
94
Troy Kiskyde8ae7b2013-10-10 15:27:55 -070095int board_usb_cleanup(int index, enum usb_init_type init)
Marek Vasut163551a2010-05-11 04:31:44 +020096{
Mateusz Zalegad862f892013-10-04 19:22:26 +020097 return 0;
Marek Vasut163551a2010-05-11 04:31:44 +020098}
99
100void usb_board_stop(void)
101{
Marek Vasut2db1e962010-09-09 09:50:39 +0200102 writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
Marek Vasut163551a2010-05-11 04:31:44 +0200103 udelay(11);
Marek Vasut2db1e962010-09-09 09:50:39 +0200104 writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
Marek Vasut163551a2010-05-11 04:31:44 +0200105
Marek Vasut2db1e962010-09-09 09:50:39 +0200106 writel(readl(UHCCOMS) | 1, UHCCOMS);
Marek Vasut163551a2010-05-11 04:31:44 +0200107 udelay(10);
108
Marek Vasut2db1e962010-09-09 09:50:39 +0200109 writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
Marek Vasut163551a2010-05-11 04:31:44 +0200110
111 return;
112}
113#endif
114
115#ifdef CONFIG_DRIVER_DM9000
116int board_eth_init(bd_t *bis)
117{
118 return dm9000_initialize(bis);
119}
120#endif
Marek Vasute326a232011-11-26 07:15:36 +0100121
122#ifdef CONFIG_CMD_MMC
123int board_mmc_init(bd_t *bis)
124{
125 pxa_mmc_register(0);
126 return 0;
127}
128#endif
Marcel Ziswiler15fc2722016-11-14 21:40:28 +0100129
130static const struct pxa_serial_platdata serial_platdata = {
131 .base = (struct pxa_uart_regs *)FFUART_BASE,
132 .port = FFUART_INDEX,
133 .baudrate = CONFIG_BAUDRATE,
134};
135
136U_BOOT_DEVICE(pxa_serials) = {
137 .name = "serial_pxa",
138 .platdata = &serial_platdata,
139};