blob: 81ac8f6f4a698158bb59d52fa4e7db45d985aa56 [file] [log] [blame]
Chander Kashyapbfef54d2011-05-24 20:02:56 +00001/*
2 * Copyright (C) 2011 Samsung Electronics
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#include <common.h>
24#include <asm/io.h>
25#include <netdev.h>
26#include <asm/arch/cpu.h>
27#include <asm/arch/gpio.h>
28#include <asm/arch/mmc.h>
29#include <asm/arch/sromc.h>
30
31DECLARE_GLOBAL_DATA_PTR;
Chander Kashyap4131a772011-12-06 23:34:12 +000032struct exynos4_gpio_part1 *gpio1;
33struct exynos4_gpio_part2 *gpio2;
Chander Kashyapbfef54d2011-05-24 20:02:56 +000034
35static void smc9115_pre_init(void)
36{
37 u32 smc_bw_conf, smc_bc_conf;
38
39 /* gpio configuration GPK0CON */
Łukasz Majewski4d954cc2011-07-15 00:16:22 +000040 s5p_gpio_cfg_pin(&gpio2->y0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2));
Chander Kashyapbfef54d2011-05-24 20:02:56 +000041
42 /* Ethernet needs bus width of 16 bits */
43 smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
44 smc_bc_conf = SROMC_BC_TACS(0x0F) | SROMC_BC_TCOS(0x0F)
45 | SROMC_BC_TACC(0x0F) | SROMC_BC_TCOH(0x0F)
46 | SROMC_BC_TAH(0x0F) | SROMC_BC_TACP(0x0F)
47 | SROMC_BC_PMC(0x0F);
48
49 /* Select and configure the SROMC bank */
50 s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
51}
52
53int board_init(void)
54{
Chander Kashyap4131a772011-12-06 23:34:12 +000055 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
56 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
Chander Kashyapbfef54d2011-05-24 20:02:56 +000057
58 smc9115_pre_init();
59
Chander Kashyapbfef54d2011-05-24 20:02:56 +000060 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
61 return 0;
62}
63
64int dram_init(void)
65{
66 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
67 + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
68 + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
69 + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
70
71 return 0;
72}
73
74void dram_init_banksize(void)
75{
76 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
Chander Kashyapf5ed2952011-09-20 21:25:02 +000077 gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
78 PHYS_SDRAM_1_SIZE);
Chander Kashyapbfef54d2011-05-24 20:02:56 +000079 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
Chander Kashyapf5ed2952011-09-20 21:25:02 +000080 gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \
81 PHYS_SDRAM_2_SIZE);
Chander Kashyapbfef54d2011-05-24 20:02:56 +000082 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
Chander Kashyapf5ed2952011-09-20 21:25:02 +000083 gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \
84 PHYS_SDRAM_3_SIZE);
Chander Kashyapbfef54d2011-05-24 20:02:56 +000085 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
Chander Kashyapf5ed2952011-09-20 21:25:02 +000086 gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \
87 PHYS_SDRAM_4_SIZE);
Chander Kashyapbfef54d2011-05-24 20:02:56 +000088}
89
90int board_eth_init(bd_t *bis)
91{
92 int rc = 0;
93#ifdef CONFIG_SMC911X
94 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
95#endif
96 return rc;
97}
98
99#ifdef CONFIG_DISPLAY_BOARDINFO
100int checkboard(void)
101{
102 printf("\nBoard: SMDKV310\n");
103 return 0;
104}
105#endif
106
107#ifdef CONFIG_GENERIC_MMC
108int board_mmc_init(bd_t *bis)
109{
110 int i, err;
111
112 /*
113 * MMC2 SD card GPIO:
114 *
115 * GPK2[0] SD_2_CLK(2)
116 * GPK2[1] SD_2_CMD(2)
117 * GPK2[2] SD_2_CDn
118 * GPK2[3:6] SD_2_DATA[0:3](2)
119 */
120 for (i = 0; i < 7; i++) {
121 /* GPK2[0:6] special function 2 */
Łukasz Majewski4d954cc2011-07-15 00:16:22 +0000122 s5p_gpio_cfg_pin(&gpio2->k2, i, GPIO_FUNC(0x2));
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000123
124 /* GPK2[0:6] drv 4x */
Łukasz Majewski4d954cc2011-07-15 00:16:22 +0000125 s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000126
127 /* GPK2[0:1] pull disable */
128 if (i == 0 || i == 1) {
Chander Kashyap1e887042011-07-25 23:04:07 +0000129 s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000130 continue;
131 }
132
133 /* GPK2[2:6] pull up */
Łukasz Majewski4d954cc2011-07-15 00:16:22 +0000134 s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_UP);
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000135 }
136 err = s5p_mmc_init(2, 4);
137 return err;
138}
139#endif