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git01.mediatek.com / filogic / uboot / c31f901b7c095a32d4809608d6598ecd8fee50e4 / . / dts / upstream / src / arm / nxp / imx / imx6ull-seeed-npi-dev-board.dtsi
blob: 6bb12e0bbc7ec625920265e57140d360bd80cc4d [file] [log] [blame]
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2024 Linumiz
4 * Author: Parthiban <parthiban@linumiz.com>
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8
9/ {
10 chosen {
11 stdout-path = &uart1;
12 };
13
14 gpio_buttons: gpio-keys {
15 compatible = "gpio-keys";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_button>;
18
19 button-0 {
20 gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
21 label = "SW2";
22 linux,code = <KEY_A>;
23 wakeup-source;
24 };
25 };
26
27 gpio-leds {
28 compatible = "gpio-leds";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinctrl_gpio_leds>;
31
32 led-blue {
33 gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
34 label = "LED_B";
35 linux,default-trigger = "heartbeat";
36 default-state = "on";
37 };
38
39 led-green {
40 gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
41 label = "LED_G";
42 linux,default-trigger = "heartbeat";
43 default-state = "on";
44 };
45
46 led-red {
47 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
48 label = "LED_R";
49 linux,default-trigger = "heartbeat";
50 default-state = "on";
51 };
52
53 led-user {
54 gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
55 label = "User";
56 linux,default-trigger = "heartbeat";
57 default-state = "on";
58 };
59 };
60
61 reg_5v_sys: regulator-5v-sys {
62 compatible = "regulator-fixed";
63 regulator-name = "5V_SYS";
64 regulator-min-microvolt = <5000000>;
65 regulator-max-microvolt = <5000000>;
66 regulator-always-on;
67 };
68
69 reg_5v: regulator-5v {
70 compatible = "regulator-fixed";
71 regulator-name = "5V";
72 regulator-min-microvolt = <5000000>;
73 regulator-max-microvolt = <5000000>;
74 regulator-always-on;
75 vin-supply = <&reg_5v_sys>;
76 };
77
78 reg_3v3_in: regulator-3v3-in {
79 compatible = "regulator-fixed";
80 regulator-name = "3V3_IN";
81 regulator-min-microvolt = <3300000>;
82 regulator-max-microvolt = <3300000>;
83 regulator-always-on;
84 vin-supply = <&reg_5v_sys>;
85 };
86
87 reg_3v3: regulator-3v3 {
88 compatible = "regulator-fixed";
89 regulator-name = "3V3";
90 regulator-min-microvolt = <3300000>;
91 regulator-max-microvolt = <3300000>;
92 regulator-always-on;
93 vin-supply = <&reg_3v3_in>;
94 };
95
96 reg_sd1_vmmc: regulator-sd1-vmmc {
97 compatible = "regulator-fixed";
98 regulator-name = "3V3_SD";
99 regulator-min-microvolt = <3300000>;
100 regulator-max-microvolt = <3300000>;
101 gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_reg_vmmc>;
104 enable-active-high;
105 regulator-always-on;
106 vin-supply = <&reg_3v3>;
107 };
108};
109
110&csi {
111 pinctrl-names = "default";
112 pinctrl-0 = <&pinctrl_csi1>;
113 status = "disabled"; /* LED Blue & Green shared */
114};
115
116&fec1 {
117 pinctrl-names = "default";
118 pinctrl-0 = <&pinctrl_enet1>;
119 phy-mode = "rmii";
120 phy-handle = <&ethphy0>;
121 status = "okay";
122};
123
124&fec2 {
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_enet2>;
127 phy-mode = "rmii";
128 phy-handle = <&ethphy1>;
129 status = "okay";
130
131 mdio {
132 #address-cells = <1>;
133 #size-cells = <0>;
134
135 ethphy0: ethernet-phy@2 {
136 compatible = "ethernet-phy-ieee802.3-c22";
137 reg = <2>;
138 micrel,led-mode = <1>;
139 clocks = <&clks IMX6UL_CLK_ENET_REF>;
140 clock-names = "rmii-ref";
141 };
142
143 ethphy1: ethernet-phy@1 {
144 compatible = "ethernet-phy-ieee802.3-c22";
145 reg = <1>;
146 micrel,led-mode = <1>;
147 clocks = <&clks IMX6UL_CLK_ENET2_REF>;
148 clock-names = "rmii-ref";
149 };
150 };
151};
152
153&lcdif {
154 pinctrl-0 = <&pinctrl_lcdif>;
155 pinctrl-names = "default";
156 status = "disabled";
157};
158
159&reg_dcdc_3v3 {
160 vin-supply = <&reg_3v3_in>;
161};
162
163&sai2 {
164 assigned-clock-rates = <320000000>;
165 assigned-clocks = <&clks IMX6UL_CLK_PLL3_PFD2>;
166 pinctrl-0 = <&pinctrl_sai2>;
167 pinctrl-names = "default";
168 status = "okay";
169};
170
171&snvs_poweroff {
172 status = "okay";
173};
174
175&uart1 {
176 pinctrl-0 = <&pinctrl_uart1>;
177 status = "okay";
178};
179
180&uart2 {
181 pinctrl-0 = <&pinctrl_uart2>;
182 uart-has-rtscts;
183 status = "okay";
184};
185
186&uart3 {
187 pinctrl-0 = <&pinctrl_uart3>;
188 uart-has-rtscts;
189 status = "okay";
190};
191
192&uart4 {
193 pinctrl-0 = <&pinctrl_uart4>;
194 status = "okay";
195};
196
197&uart5 {
198 pinctrl-0 = <&pinctrl_uart5>;
199 status = "okay";
200};
201
202&usbotg1 {
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_usb_otg1_id>;
205 dr_mode = "otg";
206 srp-disable;
207 hnp-disable;
208 adp-disable;
209 status = "okay";
210};
211
212&usbotg2 {
213 dr_mode = "host";
214 disable-over-current;
215 status = "okay";
216};
217
218&usdhc1 {
219 pinctrl-names = "default", "state_100mhz", "state_200mhz";
220 pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_usdhc1_cd>;
221 pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_usdhc1_cd>;
222 pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_usdhc1_cd>;
223 cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
224 no-1-8-v;
225 keep-power-in-suspend;
226 wakeup-source;
227 vmmc-supply = <&reg_sd1_vmmc>;
228 status = "okay";
229};
230
231&iomuxc {
232 pinctrl_button: buttongrp {
233 fsl,pins = <
234 MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
235 >;
236 };
237
238 pinctrl_csi1: csi1grp {
239 fsl,pins = <
240 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
241 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
242 MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
243 MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
244 MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
245 MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
246 MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
247 MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
248 MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
249 MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
250 MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
251 >;
252 };
253
254 pinctrl_enet1: enet1grp {
255 fsl,pins = <
256 MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
257 MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
258 MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
259 MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
260 MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
261 MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
262 MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
263 MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
264 >;
265 };
266
267 pinctrl_enet2: enet2grp {
268 fsl,pins = <
269 MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
270 MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
271 MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
272 MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
273 MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
274 MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
275 MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
276 MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
277 MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
278 MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
279 >;
280 };
281
282 pinctrl_gpio_leds: ledgrp {
283 fsl,pins = <
284 MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x0b0b0
285 MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x0b0b0
286 MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x0b0b0
287 MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0
288 >;
289 };
290
291 pinctrl_lcdif: lcdif-grp {
292 fsl,pins = <
293 MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
294 MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
295 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
296 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
297 MX6UL_PAD_LCD_RESET__LCDIF_RESET 0x79
298 MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
299 MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
300 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
301 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
302 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
303 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
304 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
305 MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
306 MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
307 MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
308 MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
309 MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
310 MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
311 MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
312 MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
313 MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
314 MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
315 MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
316 MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79
317 MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79
318 MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79
319 MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79
320 MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79
321 MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79
322 MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x79
323 >;
324 };
325
326 pinctrl_reg_vmmc: usdhc1regvmmc {
327 fsl,pins = <
328 MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059
329 >;
330 };
331
332 pinctrl_sai2: sai2-grp {
333 fsl,pins = <
334 MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0
335 MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
336 MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
337 MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0
338 >;
339 };
340
341 pinctrl_uart1: uart1grp {
342 fsl,pin = <
343 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
344 MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
345 >;
346 };
347
348 pinctrl_uart2: uart2grp {
349 fsl,pin = <
350 MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
351 MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
352 MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1
353 MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x1b0b1
354 >;
355 };
356
357 pinctrl_uart3: uart3grp {
358 fsl,pin = <
359 MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
360 MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
361 MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1
362 MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
363 >;
364 };
365
366 pinctrl_uart4: uart4grp {
367 fsl,pin = <
368 MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
369 MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
370 >;
371 };
372
373 pinctrl_uart5: uart5grp {
374 fsl,pin = <
375 MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1
376 MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x1b0b1
377 >;
378 };
379
380 pinctrl_usb_otg1_id: usbotg1idgrp {
381 fsl,pin = <
382 MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
383 >;
384 };
385
386 pinctrl_usdhc1: usdhc1grp {
387 fsl,pins = <
388 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
389 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
390 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
391 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
392 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
393 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
394 >;
395 };
396
397 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
398 fsl,pins = <
399 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
400 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
401 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
402 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
403 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
404 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
405 >;
406 };
407
408 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
409 fsl,pins = <
410 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
411 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
412 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
413 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
414 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
415 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
416 >;
417 };
418
419 pinctrl_usdhc1_cd: usdhc1cd {
420 fsl,pins = <
421 MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059
422 >;
423 };
424};