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git01.mediatek.com / filogic / uboot / c31f901b7c095a32d4809608d6598ecd8fee50e4 / . / dts / upstream / src / arm / nxp / imx / imx6q-bosch-acc.dts
blob: d3f14b4d3b51e19a5bdf52f9d99da4b314da7811 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Support for the i.MX6-based Bosch ACC board.
4 *
5 * Copyright (C) 2016 Garz & Fricke GmbH
6 * Copyright (C) 2018 DENX Software Engineering GmbH, Heiko Schocher <hs@denx.de>
7 * Copyright (C) 2018 DENX Software Engineering GmbH, Niel Fourie <lusus@denx.de>
8 * Copyright (C) 2019-2021 Bosch Thermotechnik GmbH, Matthias Winker <matthias.winker@bosch.com>
9 * Copyright (C) 2022 DENX Software Engineering GmbH, Philip Oberfichtner <pro@denx.de>
10 */
11
12/dts-v1/;
13
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/leds/common.h>
16#include "imx6q.dtsi"
17
18/ {
19 model = "Bosch ACC";
20 compatible = "bosch,imx6q-acc", "fsl,imx6q";
21
22 aliases {
23 i2c0 = &i2c1;
24 i2c1 = &i2c2;
25 i2c2 = &i2c3;
26 mmc0 = &usdhc4;
27 mmc1 = &usdhc2;
28 serial0 = &uart2;
29 serial1 = &uart1;
30 };
31
32 memory@10000000 {
33 device_type = "memory";
34 reg = <0x10000000 0x40000000>;
35 };
36
37 backlight_lvds: backlight-lvds {
38 compatible = "pwm-backlight";
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]39 pwms = <&pwm1 0 200000 0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]40 brightness-levels = <0 61 499 1706 4079 8022 13938 22237 33328 47623 65535>;
41 num-interpolated-steps = <10>;
42 default-brightness-level = <60>;
43 power-supply = <&reg_lcd>;
44 };
45
46 panel {
47 compatible = "dataimage,fg1001l0dsswmg01";
48 backlight = <&backlight_lvds>;
49
50 port {
51 panel_in: endpoint {
52 remote-endpoint = <&lvds0_out>;
53 };
54 };
55 };
56
57 refclk: refclk {
58 compatible = "fixed-factor-clock";
59 #clock-cells = <0>;
60 clocks = <&clks IMX6QDL_CLK_CKO2>;
61 clock-div = <1>;
62 clock-mult = <1>;
63 clock-output-names = "12mhz_refclk";
64 assigned-clocks = <&clks IMX6QDL_CLK_CKO>,
65 <&clks IMX6QDL_CLK_CKO2>,
66 <&clks IMX6QDL_CLK_CKO2_SEL>;
67 assigned-clock-parents = <&clks IMX6QDL_CLK_CKO2>,
68 <&clks IMX6QDL_CLK_CKO2_PODF>,
69 <&clks IMX6QDL_CLK_OSC>;
70 assigned-clock-rates = <0>, <12000000>, <0>;
71 };
72
73 cpus {
74 cpu0: cpu@0 {
75 operating-points = <
76 /* kHz uV */
77 1200000 1275000
78 996000 1225000
79 852000 1225000
80 792000 1150000
81 396000 950000
82 >;
83 fsl,soc-operating-points = <
84 /* ARM kHz SOC-PU uV */
85 1200000 1225000
86 996000 1175000
87 852000 1175000
88 792000 1150000
89 396000 1150000
90 >;
91 };
92
93 cpu1: cpu@1 {
94 operating-points = <
95 /* kHz uV */
96 1200000 1275000
97 996000 1225000
98 852000 1225000
99 792000 1150000
100 396000 950000
101 >;
102 fsl,soc-operating-points = <
103 /* ARM kHz SOC-PU uV */
104 1200000 1225000
105 996000 1175000
106 852000 1175000
107 792000 1150000
108 396000 1150000
109 >;
110 };
111 };
112
113 pwm-leds {
114 compatible = "pwm-leds";
115
116 led_red: led-0 {
117 color = <LED_COLOR_ID_RED>;
118 max-brightness = <248>;
119 default-state = "off";
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]120 pwms = <&pwm2 0 500000 0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]121 };
122
123 led_white: led-1 {
124 color = <LED_COLOR_ID_WHITE>;
125 max-brightness = <248>;
126 default-state = "off";
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]127 pwms = <&pwm3 0 500000 0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]128 linux,default-trigger = "heartbeat";
129 };
130 };
131
132 gpio-leds {
133 compatible = "gpio-leds";
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_reset_gpio_led>;
136
137 led-2 {
138 color = <LED_COLOR_ID_RED>;
139 gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
140 default-state = "off";
141 };
142 };
143
144 reg_5p0: regulator-5p0 {
145 compatible = "regulator-fixed";
146 regulator-name = "5p0";
147 };
148
149 reg_vin: regulator-vin {
150 compatible = "regulator-fixed";
151 regulator-name = "VIN";
152 regulator-min-microvolt = <4500000>;
153 regulator-max-microvolt = <4500000>;
154 regulator-always-on;
155 vin-supply = <&reg_5p0>;
156 };
157
158 reg_usb_otg_vbus: regulator-usb-otg-vbus {
159 compatible = "regulator-fixed";
160 regulator-name = "usb_otg_vbus";
161 regulator-min-microvolt = <5000000>;
162 regulator-max-microvolt = <5000000>;
163 };
164
165 reg_usb_h1_vbus: regulator-usb-h1-vbus {
166 compatible = "regulator-fixed";
167 regulator-name = "usb_h1_vbus";
168 regulator-min-microvolt = <5000000>;
169 regulator-max-microvolt = <5000000>;
170 regulator-always-on;
171 vin-supply = <&reg_5p0>;
172 };
173
174 reg_usb_h2_vbus: regulator-usb-h2-vbus {
175 compatible = "regulator-fixed";
176 regulator-name = "usb_h2_vbus";
177 regulator-min-microvolt = <5000000>;
178 regulator-max-microvolt = <5000000>;
179 vin-supply = <&reg_5p0> ;
180 regulator-always-on;
181 };
182
183 reg_vsnvs: regulator-vsnvs {
184 compatible = "regulator-fixed";
185 regulator-name = "VSNVS_3V0";
186 regulator-min-microvolt = <3000000>;
187 regulator-max-microvolt = <3000000>;
188 regulator-always-on;
189 vin-supply = <&reg_5p0>;
190 };
191
192 reg_lcd: regulator-lcd {
193 compatible = "regulator-fixed";
194 regulator-name = "LCD0 POWER";
195 regulator-min-microvolt = <5000000>;
196 regulator-max-microvolt = <5000000>;
197 pinctrl-names = "default";
198 pinctrl-0 = <&pinctrl_lcd_enable>;
199 gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>;
200 enable-active-high;
201 regulator-boot-on;
202 };
203
204 reg_dac: regulator-dac {
205 compatible = "regulator-fixed";
206 regulator-name = "vref_dac";
207 regulator-min-microvolt = <20000>;
208 regulator-max-microvolt = <20000>;
209 vin-supply = <&reg_5p0> ;
210 regulator-boot-on;
211 };
212
213 reg_sw4: regulator-sw4 {
214 compatible = "regulator-fixed";
215 regulator-name = "SW4_3V3";
216 regulator-min-microvolt = <3300000>;
217 regulator-max-microvolt = <3300000>;
218 regulator-always-on;
219 vin-supply = <&reg_5p0>;
220 };
221
222 reg_sys: regulator-sys {
223 compatible = "regulator-fixed";
224 regulator-name = "SYS_4V2";
225 regulator-min-microvolt = <4200000>;
226 regulator-max-microvolt = <4200000>;
227 regulator-always-on;
228 vin-supply = <&reg_5p0>;
229 };
230};
231
232&reg_arm {
233 vin-supply = <&sw2_reg>;
234};
235
236&reg_soc {
237 vin-supply = <&sw1c_reg>;
238};
239
240&reg_vdd1p1 {
241 vin-supply = <&reg_vsnvs>;
242};
243
244&reg_vdd2p5 {
245 vin-supply = <&reg_vsnvs>;
246};
247
248&reg_vdd3p0 {
249 vin-supply = <&reg_vsnvs>;
250};
251
252&fec {
253 pinctrl-names = "default";
254 pinctrl-0 = <&pinctrl_enet>;
255 clocks = <&clks IMX6QDL_CLK_ENET>,
256 <&clks IMX6QDL_CLK_ENET>,
257 <&clks IMX6QDL_CLK_ENET>,
258 <&clks IMX6QDL_CLK_ENET_REF>;
259 clock-names = "ipg", "ahb", "ptp", "enet_out";
260 phy-mode = "rmii";
261 phy-supply = <&reg_sw4>;
262 phy-handle = <&ethphy>;
263 status = "okay";
264
265 mdio {
266 #address-cells = <1>;
267 #size-cells = <0>;
268
269 ethphy: ethernet-phy@0 {
270 compatible = "ethernet-phy-ieee802.3-c22";
271 reg = <0>;
272 interrupt-parent = <&gpio1>;
273 interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
274 smsc,disable-energy-detect;
275 };
276 };
277};
278
279&gpu_vg {
280 status = "disabled";
281};
282
283&gpu_2d {
284 status = "disabled";
285};
286
287&i2c1 {
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_i2c1>;
290 clock-frequency = <400000>;
291 status = "okay";
292
293 pmic: pmic@8 {
294 compatible = "fsl,pfuze100";
295 reg = <0x08>;
296
297 regulators {
298 sw1c_reg: sw1c {
299 regulator-name = "VDD_SOC (sw1abc)";
300 regulator-min-microvolt = <1275000>;
301 regulator-max-microvolt = <1500000>;
302 regulator-boot-on;
303 regulator-always-on;
304 regulator-ramp-delay = <6250>;
305 };
306
307 sw2_reg: sw2 {
308 regulator-name = "VDD_ARM (sw2)";
309 regulator-min-microvolt = <1050000>;
310 regulator-max-microvolt = <1500000>;
311 regulator-boot-on;
312 regulator-always-on;
313 regulator-ramp-delay = <6250>;
314 };
315
316 sw3a_reg: sw3a {
317 regulator-name = "DDR_1V5a";
318 regulator-boot-on;
319 regulator-always-on;
320
321 };
322
323 sw3b_reg: sw3b {
324 regulator-name = "DDR_1V5b";
325 regulator-boot-on;
326 regulator-always-on;
327
328 };
329
330 sw4_reg: sw4 {
331 regulator-name = "AUX 3V15 (sw4)";
332 regulator-min-microvolt = <800000>;
333 regulator-max-microvolt = <3300000>;
334 };
335
336 swbst_reg: swbst {
337 regulator-min-microvolt = <5000000>;
338 regulator-max-microvolt = <5150000>;
339 regulator-boot-on;
340 regulator-always-on;
341 status = "disabled";
342 };
343
344 snvs_reg: vsnvs {
345 regulator-min-microvolt = <1200000>;
346 regulator-max-microvolt = <3000000>;
347 regulator-boot-on;
348 regulator-always-on;
349 };
350
351 vref_reg: vrefddr {
352 regulator-boot-on;
353 regulator-always-on;
354 };
355
356 vgen1_reg: vgen1 {
357 regulator-min-microvolt = <800000>;
358 regulator-max-microvolt = <1550000>;
359 regulator-always-on;
360 };
361
362 vgen2_reg: vgen2 {
363 regulator-min-microvolt = <800000>;
364 regulator-max-microvolt = <1550000>;
365 regulator-always-on;
366 };
367
368 vgen3_reg: vgen3 {
369 regulator-min-microvolt = <1800000>;
370 regulator-max-microvolt = <3300000>;
371 regulator-always-on;
372 };
373
374 vgen4_reg: vgen4 {
375 regulator-min-microvolt = <1800000>;
376 regulator-max-microvolt = <3300000>;
377 regulator-always-on;
378 regulator-boot-on;
379 };
380
381 vgen5_reg: vgen5 {
382 regulator-min-microvolt = <1800000>;
383 regulator-max-microvolt = <3300000>;
384 regulator-always-on;
385 regulator-boot-on;
386 };
387
388 vgen6_reg: vgen6 {
389 regulator-min-microvolt = <1800000>;
390 regulator-max-microvolt = <3300000>;
391 regulator-always-on;
392 };
393 };
394 };
395
396 lm75: sensor@49 {
397 compatible = "national,lm75b";
398 pinctrl-names = "default";
399 pinctrl-0 = <&pinctrl_lm75>;
400 reg = <0x49>;
401 };
402
403 eeprom: eeprom@50 {
404 compatible = "atmel,24c32";
405 reg = <0x50>;
406 pagesize = <32>;
407 };
408
409 rtc: rtc@51 {
410 pinctrl-names = "default";
411 pinctrl-0 = <&pinctrl_rtc>;
412 compatible = "nxp,pcf8563";
413 reg = <0x51>;
414 };
415};
416
417&i2c2 {
418 pinctrl-names = "default";
419 pinctrl-0 = <&pinctrl_i2c2>;
420 clock-frequency = <100000>;
421 status = "okay";
422
423 eeprom_ext: eeprom@50 {
424 compatible = "atmel,24c32";
425 reg = <0x50>;
426 pagesize = <32>;
427 };
428};
429
430&i2c3 {
431 pinctrl-names = "default";
432 pinctrl-0 = <&pinctrl_i2c3>;
433 clock-frequency = <400000>;
434 status = "okay";
435
436 usb3503: usb@8 {
437 compatible = "smsc,usb3503";
438 pinctrl-names = "default";
439 pinctrl-0 = <&pinctrl_usb3503>;
440 reg = <0x08>;
441 connect-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* Old: 0, SS: HIGH */
442 intn-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; /* Old: 1, SS: HIGH */
443 reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; /* Old: 0, SS: HIGH */
444 initial-mode = <1>;
445 clocks = <&refclk>;
446 clock-names = "refclk";
447 refclk-frequency = <12000000>;
448 };
449
450 exc3000: touchscreen@2a {
451 compatible = "eeti,exc3000";
452 reg = <0x2a>;
453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_ctouch>;
455 interrupt-parent = <&gpio4>;
456 interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
457 touchscreen-size-x = <4096>;
458 touchscreen-size-y = <4096>;
459 };
460
461 vcnl4035: light-sensor@60 {
462 compatible = "vishay,vcnl4035";
463 pinctrl-names = "default";
464 pinctrl-0 = <&pinctrl_proximity>;
465 reg = <0x60>;
466 };
467};
468
469&ldb {
470 status = "okay";
471
472 lvds0: lvds-channel@0 {
473 fsl,data-mapping = "spwg";
474 fsl,data-width = <24>;
475
476 port@4 {
477 reg = <4>;
478
479 lvds0_out: endpoint {
480 remote-endpoint = <&panel_in>;
481 };
482 };
483 };
484};
485
486&pwm1 {
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]487 pinctrl-names = "default";
488 pinctrl-0 = <&pinctrl_pwm1>;
489 status = "okay";
490};
491
492&pwm2 {
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]493 pinctrl-names = "default";
494 pinctrl-0 = <&pinctrl_pwm2>;
495 status = "okay";
496};
497
498&pwm3 {
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]499 pinctrl-names = "default";
500 pinctrl-0 = <&pinctrl_pwm3>;
501 status = "okay";
502};
503
504&pwm4 {
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]505 pinctrl-names = "default";
506 pinctrl-0 = <&pinctrl_pwm4>;
507 status = "okay";
508};
509
510&uart1 {
511 pinctrl-names = "default";
512 pinctrl-0 = <&pinctrl_uart1>;
513 rts-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
514 linux,rs485-enabled-at-boot-time;
515 rs485-rx-during-tx;
516 status = "okay";
517};
518
519&uart2 {
520 pinctrl-names = "default";
521 pinctrl-0 = <&pinctrl_uart2>;
522 uart-has-rtscts;
523 status = "okay";
524};
525
526&usbh1 {
527 vbus-supply = <&reg_usb_h1_vbus>;
528 status = "okay";
529};
530
531&usbh2 {
532 pinctrl-names = "idle", "active";
533 pinctrl-0 = <&pinctrl_usbh2_idle>;
534 pinctrl-1 = <&pinctrl_usbh2_active>;
535 vbus-supply = <&reg_usb_h2_vbus>;
536 status = "okay";
537};
538
539&usbotg {
540 pinctrl-names = "default";
541 pinctrl-0 = <&pinctrl_usbotg>;
542 vbus-supply = <&reg_usb_otg_vbus>;
543 disable-over-current;
544 dr_mode = "otg";
545 srp-disable;
546 hnp-disable;
547 adp-disable;
548 status = "okay";
549};
550
551&usbphynop1 {
552 clocks = <&clks IMX6QDL_CLK_USBPHY1>;
553 clock-names = "main_clk";
554 vcc-supply = <&reg_usb_h1_vbus>;
555};
556
557&usbphynop2 {
558 vcc-supply = <&reg_usb_h2_vbus>;
559};
560
561&usdhc2 {
562 pinctrl-names = "default";
563 pinctrl-0 = <&pinctrl_usdhc2>;
564 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
565 no-1-8-v;
566 keep-power-in-suspend;
567 wakeup-source;
568 voltage-ranges = <3300 3300>;
569 vmmc-supply = <&reg_sw4>;
570 fsl,wp-controller;
571 status = "okay";
572};
573
574&usdhc4 {
575 pinctrl-names = "default";
576 pinctrl-0 = <&pinctrl_usdhc4>;
577 bus-width = <8>;
578 non-removable;
579 no-1-8-v;
580 keep-power-in-suspend;
581 voltage-ranges = <3300 3300>;
582 vmmc-supply = <&reg_sw4>;
583 fsl,wp-controller;
584 status = "okay";
585};
586
587&wdog1 {
588 pinctrl-names = "default";
589 pinctrl-0 = <&pinctrl_wdog1>;
590 fsl,ext-reset-output;
591 timeout-sec = <10>;
592 status = "okay";
593};
594
595&iomuxc {
596 pinctrl_enet: enetgrp {
597 fsl,pins = <
598 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
599 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
600 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
601 MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0 /* FEC INT */
602 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
603 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x0001b098
604 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
605 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
606 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x0001b098
607 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x0001b098
608 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
609 >;
610 };
611
612 pinctrl_reset_gpio_led: reset-gpio-led-grp {
613 fsl,pins = <
614 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0
615 >;
616 };
617
618 pinctrl_i2c1: i2c1grp {
619 fsl,pins = <
620 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
621 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
622 >;
623 };
624
625 pinctrl_i2c2: i2c2grp {
626 fsl,pins = <
627 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b810
628 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b810
629 >;
630 };
631
632 pinctrl_i2c3: i2c3grp {
633 fsl,pins = <
634 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
635 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
636 >;
637 };
638
639 pinctrl_lcd_enable: lcdenablegrp {
640 fsl,pins = <
641 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b0 /* lcd enable */
642 MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x1b0b0 /* sel6_8 */
643 >;
644 };
645
646 pinctrl_lm75: lm75grp {
647 fsl,pins = <
648 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
649 >;
650 };
651
652 pinctrl_proximity: proximitygrp {
653 fsl,pins = <
654 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
655 >;
656 };
657
658 pinctrl_pwm1: pwm1grp {
659 fsl,pins = <
660 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x0001b0b0
661 >;
662 };
663
664 pinctrl_pwm2: pwm2grp {
665 fsl,pins = <
666 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x0001b0b0
667 >;
668 };
669
670 pinctrl_pwm3: pwm3grp {
671 fsl,pins = <
672 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x0001b0b0
673 >;
674 };
675
676 pinctrl_pwm4: pwm4grp {
677 fsl,pins = <
678 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x0001b0b0
679 >;
680 };
681
682 pinctrl_rtc: rtc-grp {
683 fsl,pins = <
684 MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x1b0b0 /* RTC INT */
685 >;
686 };
687
688 pinctrl_ctouch: ctouch-grp {
689 fsl,pins = <
690 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 /* CTOUCH_INT */
691 MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x0001b0b0 /* CTOUCH_RESET */
692 >;
693 };
694
695 pinctrl_uart1: uart1grp {
696 fsl,pins = <
697 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
698 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
699 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x0001b0b0
700 >;
701 };
702
703 pinctrl_uart2: uart2grp {
704 fsl,pins = <
705 MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1
706 MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1
707 MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1
708 MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1
709 >;
710 };
711
712 pinctrl_usbh2_idle: usbh2-idle-grp {
713 fsl,pins = <
714 MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x00013018
715 MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x00013018
716 >;
717 };
718
719 pinctrl_usbh2_active: usbh2-active-grp {
720 fsl,pins = <
721 MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x00013018
722 MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x00017018
723 >;
724 };
725
726 pinctrl_usb3503: usb3503-grp {
727 fsl,pins = <
728 MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x00000018
729 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 /* USB INT */
730 MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x0001b0b0 /* USB Reset */
731 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 /* USB Connect */
732 >;
733 };
734
735 pinctrl_usbotg: usbotggrp {
736 fsl,pins = <
737 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
738 >;
739 };
740
741 pinctrl_usdhc2: usdhc2grp {
742 fsl,pins = <
743 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x00017069
744 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x00010038
745 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x00017069
746 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x00017069
747 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x00017069
748 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x00017069
749 MX6QDL_PAD_GPIO_4__SD2_CD_B 0x0001b0b0
750 >;
751 };
752
753 pinctrl_usdhc4: usdhc4grp {
754 fsl,pins = <
755 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x00017059
756 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x00010059
757 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x00017059
758 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x00017059
759 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x00017059
760 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x00017059
761 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x00017059
762 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x00017059
763 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x00017059
764 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x00017059
765 >;
766 };
767
768 pinctrl_wdog1: wdoggrp {
769 fsl,pins = <
770 MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0
771 >;
772 };
773};