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git01.mediatek.com / filogic / uboot / c31f901b7c095a32d4809608d6598ecd8fee50e4 / . / dts / upstream / src / arm / nvidia / tegra124-jetson-tk1.dts
blob: f09109be1152e84d928d2563c4cf4f0fc310beda [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/input.h>
5#include "tegra124.dtsi"
6
7#include "tegra124-jetson-tk1-emc.dtsi"
8
9/ {
10 model = "NVIDIA Tegra124 Jetson TK1";
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
12
13 aliases {
14 rtc0 = "/i2c@7000d000/pmic@40";
15 rtc1 = "/rtc@7000e000";
16
17 /* This order keeps the mapping DB9 connector <-> ttyS0 */
18 serial0 = &uartd;
19 serial1 = &uarta;
20 serial2 = &uartb;
21 };
22
23 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
27 memory@80000000 {
28 reg = <0x0 0x80000000 0x0 0x80000000>;
29 };
30
31 pcie@1003000 {
32 status = "okay";
33
34 avddio-pex-supply = <&vdd_1v05_run>;
35 dvddio-pex-supply = <&vdd_1v05_run>;
36 avdd-pex-pll-supply = <&vdd_1v05_run>;
37 hvdd-pex-supply = <&vdd_3v3_lp0>;
38 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
39 vddio-pex-ctl-supply = <&vdd_3v3_lp0>;
40 avdd-pll-erefe-supply = <&avdd_1v05_run>;
41
42 /* Mini PCIe */
43 pci@1,0 {
44 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
45 phy-names = "pcie-0";
46 status = "okay";
47 };
48
49 /* Gigabit Ethernet */
50 pci@2,0 {
51 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>;
52 phy-names = "pcie-0";
53 status = "okay";
54 };
55 };
56
57 host1x@50000000 {
58 hdmi@54280000 {
59 status = "okay";
60
61 hdmi-supply = <&vdd_5v0_hdmi>;
62 pll-supply = <&vdd_hdmi_pll>;
63 vdd-supply = <&vdd_3v3_hdmi>;
64
65 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
66 nvidia,hpd-gpio =
67 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
68 };
69 };
70
71 gpu@57000000 {
72 /*
73 * Node left disabled on purpose - the bootloader will enable
74 * it after having set the VPR up
75 */
76 vdd-supply = <&vdd_gpu>;
77 };
78
79 pinmux: pinmux@70000868 {
80 pinctrl-names = "boot";
81 pinctrl-0 = <&state_boot>;
82
83 state_boot: pinmux {
84 clk_32k_out_pa0 {
85 nvidia,pins = "clk_32k_out_pa0";
86 nvidia,function = "soc";
87 nvidia,pull = <TEGRA_PIN_PULL_UP>;
88 nvidia,tristate = <TEGRA_PIN_ENABLE>;
89 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
90 };
91 uart3_cts_n_pa1 {
92 nvidia,pins = "uart3_cts_n_pa1";
93 nvidia,function = "gmi";
94 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
95 nvidia,tristate = <TEGRA_PIN_ENABLE>;
96 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
97 };
98 dap2_fs_pa2 {
99 nvidia,pins = "dap2_fs_pa2";
100 nvidia,function = "i2s1";
101 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
102 nvidia,tristate = <TEGRA_PIN_DISABLE>;
103 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
104 };
105 dap2_sclk_pa3 {
106 nvidia,pins = "dap2_sclk_pa3";
107 nvidia,function = "i2s1";
108 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
109 nvidia,tristate = <TEGRA_PIN_DISABLE>;
110 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
111 };
112 dap2_din_pa4 {
113 nvidia,pins = "dap2_din_pa4";
114 nvidia,function = "i2s1";
115 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
116 nvidia,tristate = <TEGRA_PIN_ENABLE>;
117 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
118 };
119 dap2_dout_pa5 {
120 nvidia,pins = "dap2_dout_pa5";
121 nvidia,function = "i2s1";
122 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
123 nvidia,tristate = <TEGRA_PIN_DISABLE>;
124 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
125 };
126 sdmmc3_clk_pa6 {
127 nvidia,pins = "sdmmc3_clk_pa6";
128 nvidia,function = "sdmmc3";
129 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
130 nvidia,tristate = <TEGRA_PIN_DISABLE>;
131 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
132 };
133 sdmmc3_cmd_pa7 {
134 nvidia,pins = "sdmmc3_cmd_pa7";
135 nvidia,function = "sdmmc3";
136 nvidia,pull = <TEGRA_PIN_PULL_UP>;
137 nvidia,tristate = <TEGRA_PIN_DISABLE>;
138 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
139 };
140 pb0 {
141 nvidia,pins = "pb0";
142 nvidia,function = "uartd";
143 nvidia,pull = <TEGRA_PIN_PULL_UP>;
144 nvidia,tristate = <TEGRA_PIN_ENABLE>;
145 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
146 };
147 pb1 {
148 nvidia,pins = "pb1";
149 nvidia,function = "uartd";
150 nvidia,pull = <TEGRA_PIN_PULL_UP>;
151 nvidia,tristate = <TEGRA_PIN_ENABLE>;
152 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
153 };
154 sdmmc3_dat3_pb4 {
155 nvidia,pins = "sdmmc3_dat3_pb4";
156 nvidia,function = "sdmmc3";
157 nvidia,pull = <TEGRA_PIN_PULL_UP>;
158 nvidia,tristate = <TEGRA_PIN_DISABLE>;
159 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
160 };
161 sdmmc3_dat2_pb5 {
162 nvidia,pins = "sdmmc3_dat2_pb5";
163 nvidia,function = "sdmmc3";
164 nvidia,pull = <TEGRA_PIN_PULL_UP>;
165 nvidia,tristate = <TEGRA_PIN_DISABLE>;
166 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
167 };
168 sdmmc3_dat1_pb6 {
169 nvidia,pins = "sdmmc3_dat1_pb6";
170 nvidia,function = "sdmmc3";
171 nvidia,pull = <TEGRA_PIN_PULL_UP>;
172 nvidia,tristate = <TEGRA_PIN_DISABLE>;
173 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
174 };
175 sdmmc3_dat0_pb7 {
176 nvidia,pins = "sdmmc3_dat0_pb7";
177 nvidia,function = "sdmmc3";
178 nvidia,pull = <TEGRA_PIN_PULL_UP>;
179 nvidia,tristate = <TEGRA_PIN_DISABLE>;
180 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
181 };
182 uart3_rts_n_pc0 {
183 nvidia,pins = "uart3_rts_n_pc0";
184 nvidia,function = "gmi";
185 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
186 nvidia,tristate = <TEGRA_PIN_ENABLE>;
187 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
188 };
189 uart2_txd_pc2 {
190 nvidia,pins = "uart2_txd_pc2";
191 nvidia,function = "irda";
192 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
193 nvidia,tristate = <TEGRA_PIN_DISABLE>;
194 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
195 };
196 uart2_rxd_pc3 {
197 nvidia,pins = "uart2_rxd_pc3";
198 nvidia,function = "irda";
199 nvidia,pull = <TEGRA_PIN_PULL_UP>;
200 nvidia,tristate = <TEGRA_PIN_ENABLE>;
201 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
202 };
203 gen1_i2c_scl_pc4 {
204 nvidia,pins = "gen1_i2c_scl_pc4";
205 nvidia,function = "i2c1";
206 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
207 nvidia,tristate = <TEGRA_PIN_DISABLE>;
208 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
209 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
210 };
211 gen1_i2c_sda_pc5 {
212 nvidia,pins = "gen1_i2c_sda_pc5";
213 nvidia,function = "i2c1";
214 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
215 nvidia,tristate = <TEGRA_PIN_DISABLE>;
216 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
217 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
218 };
219 pc7 {
220 nvidia,pins = "pc7";
221 nvidia,function = "rsvd1";
222 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
223 nvidia,tristate = <TEGRA_PIN_ENABLE>;
224 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
225 };
226 pg0 {
227 nvidia,pins = "pg0";
228 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
229 nvidia,tristate = <TEGRA_PIN_ENABLE>;
230 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
231 };
232 pg1 {
233 nvidia,pins = "pg1";
234 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
235 nvidia,tristate = <TEGRA_PIN_ENABLE>;
236 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
237 };
238 pg2 {
239 nvidia,pins = "pg2";
240 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
241 nvidia,tristate = <TEGRA_PIN_ENABLE>;
242 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
243 };
244 pg3 {
245 nvidia,pins = "pg3";
246 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
247 nvidia,tristate = <TEGRA_PIN_ENABLE>;
248 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
249 };
250 pg4 {
251 nvidia,pins = "pg4";
252 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
253 nvidia,tristate = <TEGRA_PIN_ENABLE>;
254 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
255 };
256 pg5 {
257 nvidia,pins = "pg5";
258 nvidia,function = "spi4";
259 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
260 nvidia,tristate = <TEGRA_PIN_DISABLE>;
261 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
262 };
263 pg6 {
264 nvidia,pins = "pg6";
265 nvidia,function = "spi4";
266 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
267 nvidia,tristate = <TEGRA_PIN_DISABLE>;
268 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
269 };
270 pg7 {
271 nvidia,pins = "pg7";
272 nvidia,function = "spi4";
273 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
274 nvidia,tristate = <TEGRA_PIN_ENABLE>;
275 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
276 };
277 ph0 {
278 nvidia,pins = "ph0";
279 nvidia,function = "gmi";
280 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
281 nvidia,tristate = <TEGRA_PIN_ENABLE>;
282 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
283 };
284 ph1 {
285 nvidia,pins = "ph1";
286 nvidia,function = "pwm1";
287 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
288 nvidia,tristate = <TEGRA_PIN_DISABLE>;
289 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
290 };
291 ph2 {
292 nvidia,pins = "ph2";
293 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
294 nvidia,tristate = <TEGRA_PIN_DISABLE>;
295 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
296 };
297 ph3 {
298 nvidia,pins = "ph3";
299 nvidia,function = "gmi";
300 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
301 nvidia,tristate = <TEGRA_PIN_ENABLE>;
302 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
303 };
304 ph4 {
305 nvidia,pins = "ph4";
306 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
307 nvidia,tristate = <TEGRA_PIN_ENABLE>;
308 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
309 };
310 ph5 {
311 nvidia,pins = "ph5";
312 nvidia,function = "rsvd2";
313 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
314 nvidia,tristate = <TEGRA_PIN_ENABLE>;
315 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
316 };
317 ph6 {
318 nvidia,pins = "ph6";
319 nvidia,function = "gmi";
320 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
321 nvidia,tristate = <TEGRA_PIN_ENABLE>;
322 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
323 };
324 ph7 {
325 nvidia,pins = "ph7";
326 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
327 nvidia,tristate = <TEGRA_PIN_DISABLE>;
328 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
329 };
330 pi0 {
331 nvidia,pins = "pi0";
332 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
333 nvidia,tristate = <TEGRA_PIN_DISABLE>;
334 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
335 };
336 pi1 {
337 nvidia,pins = "pi1";
338 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
339 nvidia,tristate = <TEGRA_PIN_ENABLE>;
340 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
341 };
342 pi2 {
343 nvidia,pins = "pi2";
344 nvidia,function = "rsvd4";
345 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
346 nvidia,tristate = <TEGRA_PIN_ENABLE>;
347 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
348 };
349 pi3 {
350 nvidia,pins = "pi3";
351 nvidia,function = "spi4";
352 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
353 nvidia,tristate = <TEGRA_PIN_DISABLE>;
354 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
355 };
356 pi4 {
357 nvidia,pins = "pi4";
358 nvidia,function = "gmi";
359 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
360 nvidia,tristate = <TEGRA_PIN_ENABLE>;
361 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
362 };
363 pi5 {
364 nvidia,pins = "pi5";
365 nvidia,function = "rsvd2";
366 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
367 nvidia,tristate = <TEGRA_PIN_ENABLE>;
368 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
369 };
370 pi6 {
371 nvidia,pins = "pi6";
372 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
373 nvidia,tristate = <TEGRA_PIN_ENABLE>;
374 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
375 };
376 pi7 {
377 nvidia,pins = "pi7";
378 nvidia,function = "rsvd1";
379 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
380 nvidia,tristate = <TEGRA_PIN_ENABLE>;
381 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
382 };
383 pj0 {
384 nvidia,pins = "pj0";
385 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
386 nvidia,tristate = <TEGRA_PIN_ENABLE>;
387 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
388 };
389 pj2 {
390 nvidia,pins = "pj2";
391 nvidia,function = "rsvd1";
392 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
393 nvidia,tristate = <TEGRA_PIN_ENABLE>;
394 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
395 };
396 uart2_cts_n_pj5 {
397 nvidia,pins = "uart2_cts_n_pj5";
398 nvidia,function = "uartb";
399 nvidia,pull = <TEGRA_PIN_PULL_UP>;
400 nvidia,tristate = <TEGRA_PIN_ENABLE>;
401 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
402 };
403 uart2_rts_n_pj6 {
404 nvidia,pins = "uart2_rts_n_pj6";
405 nvidia,function = "uartb";
406 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
407 nvidia,tristate = <TEGRA_PIN_DISABLE>;
408 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
409 };
410 pj7 {
411 nvidia,pins = "pj7";
412 nvidia,function = "uartd";
413 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
414 nvidia,tristate = <TEGRA_PIN_DISABLE>;
415 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
416 };
417 pk0 {
418 nvidia,pins = "pk0";
419 nvidia,function = "rsvd1";
420 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
421 nvidia,tristate = <TEGRA_PIN_ENABLE>;
422 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
423 };
424 pk1 {
425 nvidia,pins = "pk1";
426 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
427 nvidia,tristate = <TEGRA_PIN_DISABLE>;
428 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
429 };
430 pk2 {
431 nvidia,pins = "pk2";
432 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
433 nvidia,tristate = <TEGRA_PIN_DISABLE>;
434 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
435 };
436 pk3 {
437 nvidia,pins = "pk3";
438 nvidia,function = "gmi";
439 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
440 nvidia,tristate = <TEGRA_PIN_ENABLE>;
441 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
442 };
443 pk4 {
444 nvidia,pins = "pk4";
445 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
446 nvidia,tristate = <TEGRA_PIN_DISABLE>;
447 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
448 };
449 spdif_out_pk5 {
450 nvidia,pins = "spdif_out_pk5";
451 nvidia,function = "rsvd2";
452 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
453 nvidia,tristate = <TEGRA_PIN_ENABLE>;
454 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
455 };
456 spdif_in_pk6 {
457 nvidia,pins = "spdif_in_pk6";
458 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
459 nvidia,tristate = <TEGRA_PIN_DISABLE>;
460 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
461 };
462 pk7 {
463 nvidia,pins = "pk7";
464 nvidia,function = "uartd";
465 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
466 nvidia,tristate = <TEGRA_PIN_DISABLE>;
467 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
468 };
469 dap1_fs_pn0 {
470 nvidia,pins = "dap1_fs_pn0";
471 nvidia,function = "rsvd4";
472 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
473 nvidia,tristate = <TEGRA_PIN_ENABLE>;
474 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
475 };
476 dap1_din_pn1 {
477 nvidia,pins = "dap1_din_pn1";
478 nvidia,function = "rsvd4";
479 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
480 nvidia,tristate = <TEGRA_PIN_ENABLE>;
481 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
482 };
483 dap1_dout_pn2 {
484 nvidia,pins = "dap1_dout_pn2";
485 nvidia,function = "sata";
486 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
487 nvidia,tristate = <TEGRA_PIN_DISABLE>;
488 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
489 };
490 dap1_sclk_pn3 {
491 nvidia,pins = "dap1_sclk_pn3";
492 nvidia,function = "rsvd4";
493 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
494 nvidia,tristate = <TEGRA_PIN_ENABLE>;
495 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
496 };
497 usb_vbus_en0_pn4 {
498 nvidia,pins = "usb_vbus_en0_pn4";
499 nvidia,function = "usb";
500 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
501 nvidia,tristate = <TEGRA_PIN_DISABLE>;
502 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
503 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
504 };
505 usb_vbus_en1_pn5 {
506 nvidia,pins = "usb_vbus_en1_pn5";
507 nvidia,function = "usb";
508 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
509 nvidia,tristate = <TEGRA_PIN_DISABLE>;
510 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
511 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
512 };
513 hdmi_int_pn7 {
514 nvidia,pins = "hdmi_int_pn7";
515 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
516 nvidia,tristate = <TEGRA_PIN_ENABLE>;
517 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
518 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
519 };
520 ulpi_data7_po0 {
521 nvidia,pins = "ulpi_data7_po0";
522 nvidia,function = "ulpi";
523 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
524 nvidia,tristate = <TEGRA_PIN_ENABLE>;
525 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
526 };
527 ulpi_data0_po1 {
528 nvidia,pins = "ulpi_data0_po1";
529 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
530 nvidia,tristate = <TEGRA_PIN_ENABLE>;
531 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
532 };
533 ulpi_data1_po2 {
534 nvidia,pins = "ulpi_data1_po2";
535 nvidia,function = "ulpi";
536 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
537 nvidia,tristate = <TEGRA_PIN_ENABLE>;
538 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
539 };
540 ulpi_data2_po3 {
541 nvidia,pins = "ulpi_data2_po3";
542 nvidia,function = "ulpi";
543 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
544 nvidia,tristate = <TEGRA_PIN_ENABLE>;
545 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
546 };
547 ulpi_data3_po4 {
548 nvidia,pins = "ulpi_data3_po4";
549 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
550 nvidia,tristate = <TEGRA_PIN_ENABLE>;
551 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
552 };
553 ulpi_data4_po5 {
554 nvidia,pins = "ulpi_data4_po5";
555 nvidia,function = "ulpi";
556 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
557 nvidia,tristate = <TEGRA_PIN_ENABLE>;
558 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
559 };
560 ulpi_data5_po6 {
561 nvidia,pins = "ulpi_data5_po6";
562 nvidia,function = "ulpi";
563 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
564 nvidia,tristate = <TEGRA_PIN_ENABLE>;
565 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
566 };
567 ulpi_data6_po7 {
568 nvidia,pins = "ulpi_data6_po7";
569 nvidia,function = "ulpi";
570 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
571 nvidia,tristate = <TEGRA_PIN_ENABLE>;
572 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
573 };
574 dap3_fs_pp0 {
575 nvidia,pins = "dap3_fs_pp0";
576 nvidia,function = "i2s2";
577 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
578 nvidia,tristate = <TEGRA_PIN_ENABLE>;
579 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
580 };
581 dap3_din_pp1 {
582 nvidia,pins = "dap3_din_pp1";
583 nvidia,function = "i2s2";
584 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
585 nvidia,tristate = <TEGRA_PIN_ENABLE>;
586 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
587 };
588 dap3_dout_pp2 {
589 nvidia,pins = "dap3_dout_pp2";
590 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
591 nvidia,tristate = <TEGRA_PIN_DISABLE>;
592 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
593 };
594 dap3_sclk_pp3 {
595 nvidia,pins = "dap3_sclk_pp3";
596 nvidia,function = "rsvd3";
597 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
598 nvidia,tristate = <TEGRA_PIN_ENABLE>;
599 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
600 };
601 dap4_fs_pp4 {
602 nvidia,pins = "dap4_fs_pp4";
603 nvidia,function = "rsvd4";
604 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
605 nvidia,tristate = <TEGRA_PIN_ENABLE>;
606 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
607 };
608 dap4_din_pp5 {
609 nvidia,pins = "dap4_din_pp5";
610 nvidia,function = "rsvd3";
611 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
612 nvidia,tristate = <TEGRA_PIN_ENABLE>;
613 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
614 };
615 dap4_dout_pp6 {
616 nvidia,pins = "dap4_dout_pp6";
617 nvidia,function = "rsvd4";
618 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
619 nvidia,tristate = <TEGRA_PIN_ENABLE>;
620 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
621 };
622 dap4_sclk_pp7 {
623 nvidia,pins = "dap4_sclk_pp7";
624 nvidia,function = "rsvd3";
625 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
626 nvidia,tristate = <TEGRA_PIN_ENABLE>;
627 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
628 };
629 kb_col0_pq0 {
630 nvidia,pins = "kb_col0_pq0";
631 nvidia,pull = <TEGRA_PIN_PULL_UP>;
632 nvidia,tristate = <TEGRA_PIN_ENABLE>;
633 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
634 };
635 kb_col1_pq1 {
636 nvidia,pins = "kb_col1_pq1";
637 nvidia,function = "rsvd2";
638 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
639 nvidia,tristate = <TEGRA_PIN_ENABLE>;
640 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
641 };
642 kb_col2_pq2 {
643 nvidia,pins = "kb_col2_pq2";
644 nvidia,function = "rsvd2";
645 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
646 nvidia,tristate = <TEGRA_PIN_ENABLE>;
647 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
648 };
649 kb_col3_pq3 {
650 nvidia,pins = "kb_col3_pq3";
651 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
652 nvidia,tristate = <TEGRA_PIN_ENABLE>;
653 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
654 };
655 kb_col4_pq4 {
656 nvidia,pins = "kb_col4_pq4";
657 nvidia,function = "sdmmc3";
658 nvidia,pull = <TEGRA_PIN_PULL_UP>;
659 nvidia,tristate = <TEGRA_PIN_ENABLE>;
660 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
661 };
662 kb_col5_pq5 {
663 nvidia,pins = "kb_col5_pq5";
664 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
665 nvidia,tristate = <TEGRA_PIN_ENABLE>;
666 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
667 };
668 kb_col6_pq6 {
669 nvidia,pins = "kb_col6_pq6";
670 nvidia,function = "rsvd2";
671 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
672 nvidia,tristate = <TEGRA_PIN_ENABLE>;
673 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
674 };
675 kb_col7_pq7 {
676 nvidia,pins = "kb_col7_pq7";
677 nvidia,function = "rsvd2";
678 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
679 nvidia,tristate = <TEGRA_PIN_ENABLE>;
680 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
681 };
682 kb_row0_pr0 {
683 nvidia,pins = "kb_row0_pr0";
684 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
685 nvidia,tristate = <TEGRA_PIN_DISABLE>;
686 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
687 };
688 kb_row1_pr1 {
689 nvidia,pins = "kb_row1_pr1";
690 nvidia,function = "rsvd2";
691 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
692 nvidia,tristate = <TEGRA_PIN_ENABLE>;
693 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
694 };
695 kb_row2_pr2 {
696 nvidia,pins = "kb_row2_pr2";
697 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
698 nvidia,tristate = <TEGRA_PIN_DISABLE>;
699 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
700 };
701 kb_row3_pr3 {
702 nvidia,pins = "kb_row3_pr3";
703 nvidia,function = "kbc";
704 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
705 nvidia,tristate = <TEGRA_PIN_ENABLE>;
706 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
707 };
708 kb_row4_pr4 {
709 nvidia,pins = "kb_row4_pr4";
710 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
711 nvidia,tristate = <TEGRA_PIN_ENABLE>;
712 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
713 };
714 kb_row5_pr5 {
715 nvidia,pins = "kb_row5_pr5";
716 nvidia,function = "rsvd3";
717 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
718 nvidia,tristate = <TEGRA_PIN_ENABLE>;
719 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
720 };
721 kb_row6_pr6 {
722 nvidia,pins = "kb_row6_pr6";
723 nvidia,function = "displaya_alt";
724 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
725 nvidia,tristate = <TEGRA_PIN_ENABLE>;
726 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
727 };
728 kb_row7_pr7 {
729 nvidia,pins = "kb_row7_pr7";
730 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
731 nvidia,tristate = <TEGRA_PIN_ENABLE>;
732 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
733 };
734 kb_row8_ps0 {
735 nvidia,pins = "kb_row8_ps0";
736 nvidia,function = "rsvd2";
737 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
738 nvidia,tristate = <TEGRA_PIN_ENABLE>;
739 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
740 };
741 kb_row9_ps1 {
742 nvidia,pins = "kb_row9_ps1";
743 nvidia,function = "uarta";
744 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
745 nvidia,tristate = <TEGRA_PIN_DISABLE>;
746 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
747 };
748 kb_row10_ps2 {
749 nvidia,pins = "kb_row10_ps2";
750 nvidia,function = "uarta";
751 nvidia,pull = <TEGRA_PIN_PULL_UP>;
752 nvidia,tristate = <TEGRA_PIN_ENABLE>;
753 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
754 };
755 kb_row11_ps3 {
756 nvidia,pins = "kb_row11_ps3";
757 nvidia,function = "rsvd2";
758 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
759 nvidia,tristate = <TEGRA_PIN_ENABLE>;
760 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
761 };
762 kb_row12_ps4 {
763 nvidia,pins = "kb_row12_ps4";
764 nvidia,function = "rsvd2";
765 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
766 nvidia,tristate = <TEGRA_PIN_ENABLE>;
767 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
768 };
769 kb_row13_ps5 {
770 nvidia,pins = "kb_row13_ps5";
771 nvidia,function = "rsvd2";
772 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
773 nvidia,tristate = <TEGRA_PIN_ENABLE>;
774 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
775 };
776 kb_row14_ps6 {
777 nvidia,pins = "kb_row14_ps6";
778 nvidia,function = "rsvd2";
779 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
780 nvidia,tristate = <TEGRA_PIN_ENABLE>;
781 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
782 };
783 kb_row15_ps7 {
784 nvidia,pins = "kb_row15_ps7";
785 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
786 nvidia,tristate = <TEGRA_PIN_ENABLE>;
787 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
788 };
789 kb_row16_pt0 {
790 nvidia,pins = "kb_row16_pt0";
791 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
792 nvidia,tristate = <TEGRA_PIN_DISABLE>;
793 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
794 };
795 kb_row17_pt1 {
796 nvidia,pins = "kb_row17_pt1";
797 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
798 nvidia,tristate = <TEGRA_PIN_ENABLE>;
799 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
800 };
801 gen2_i2c_scl_pt5 {
802 nvidia,pins = "gen2_i2c_scl_pt5";
803 nvidia,function = "i2c2";
804 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
805 nvidia,tristate = <TEGRA_PIN_DISABLE>;
806 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
807 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
808 };
809 gen2_i2c_sda_pt6 {
810 nvidia,pins = "gen2_i2c_sda_pt6";
811 nvidia,function = "i2c2";
812 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
813 nvidia,tristate = <TEGRA_PIN_DISABLE>;
814 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
815 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
816 };
817 sdmmc4_cmd_pt7 {
818 nvidia,pins = "sdmmc4_cmd_pt7";
819 nvidia,function = "sdmmc4";
820 nvidia,pull = <TEGRA_PIN_PULL_UP>;
821 nvidia,tristate = <TEGRA_PIN_DISABLE>;
822 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
823 };
824 pu0 {
825 nvidia,pins = "pu0";
826 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
827 nvidia,tristate = <TEGRA_PIN_DISABLE>;
828 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
829 };
830 pu1 {
831 nvidia,pins = "pu1";
832 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
833 nvidia,tristate = <TEGRA_PIN_DISABLE>;
834 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
835 };
836 pu2 {
837 nvidia,pins = "pu2";
838 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
839 nvidia,tristate = <TEGRA_PIN_DISABLE>;
840 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
841 };
842 pu3 {
843 nvidia,pins = "pu3";
844 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
845 nvidia,tristate = <TEGRA_PIN_DISABLE>;
846 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
847 };
848 pu4 {
849 nvidia,pins = "pu4";
850 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
851 nvidia,tristate = <TEGRA_PIN_DISABLE>;
852 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
853 };
854 pu5 {
855 nvidia,pins = "pu5";
856 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
857 nvidia,tristate = <TEGRA_PIN_DISABLE>;
858 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
859 };
860 pu6 {
861 nvidia,pins = "pu6";
862 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
863 nvidia,tristate = <TEGRA_PIN_DISABLE>;
864 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
865 };
866 pv0 {
867 nvidia,pins = "pv0";
868 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
869 nvidia,tristate = <TEGRA_PIN_ENABLE>;
870 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
871 };
872 pv1 {
873 nvidia,pins = "pv1";
874 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
875 nvidia,tristate = <TEGRA_PIN_ENABLE>;
876 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
877 };
878 sdmmc3_cd_n_pv2 {
879 nvidia,pins = "sdmmc3_cd_n_pv2";
880 nvidia,function = "sdmmc3";
881 nvidia,pull = <TEGRA_PIN_PULL_UP>;
882 nvidia,tristate = <TEGRA_PIN_ENABLE>;
883 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
884 };
885 sdmmc1_wp_n_pv3 {
886 nvidia,pins = "sdmmc1_wp_n_pv3";
887 nvidia,function = "sdmmc1";
888 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
889 nvidia,tristate = <TEGRA_PIN_ENABLE>;
890 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
891 };
892 ddc_scl_pv4 {
893 nvidia,pins = "ddc_scl_pv4";
894 nvidia,function = "i2c4";
895 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
896 nvidia,tristate = <TEGRA_PIN_DISABLE>;
897 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
898 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
899 };
900 ddc_sda_pv5 {
901 nvidia,pins = "ddc_sda_pv5";
902 nvidia,function = "i2c4";
903 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
904 nvidia,tristate = <TEGRA_PIN_DISABLE>;
905 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
906 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
907 };
908 gpio_w2_aud_pw2 {
909 nvidia,pins = "gpio_w2_aud_pw2";
910 nvidia,function = "rsvd2";
911 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
912 nvidia,tristate = <TEGRA_PIN_ENABLE>;
913 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
914 };
915 gpio_w3_aud_pw3 {
916 nvidia,pins = "gpio_w3_aud_pw3";
917 nvidia,function = "spi6";
918 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
919 nvidia,tristate = <TEGRA_PIN_ENABLE>;
920 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
921 };
922 dap_mclk1_pw4 {
923 nvidia,pins = "dap_mclk1_pw4";
924 nvidia,function = "extperiph1";
925 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
926 nvidia,tristate = <TEGRA_PIN_DISABLE>;
927 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
928 };
929 clk2_out_pw5 {
930 nvidia,pins = "clk2_out_pw5";
931 nvidia,function = "extperiph2";
932 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
933 nvidia,tristate = <TEGRA_PIN_DISABLE>;
934 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
935 };
936 uart3_txd_pw6 {
937 nvidia,pins = "uart3_txd_pw6";
938 nvidia,function = "rsvd2";
939 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
940 nvidia,tristate = <TEGRA_PIN_ENABLE>;
941 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
942 };
943 uart3_rxd_pw7 {
944 nvidia,pins = "uart3_rxd_pw7";
945 nvidia,function = "rsvd2";
946 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
947 nvidia,tristate = <TEGRA_PIN_ENABLE>;
948 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
949 };
950 dvfs_pwm_px0 {
951 nvidia,pins = "dvfs_pwm_px0";
952 nvidia,function = "cldvfs";
953 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
954 nvidia,tristate = <TEGRA_PIN_DISABLE>;
955 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
956 };
957 gpio_x1_aud_px1 {
958 nvidia,pins = "gpio_x1_aud_px1";
959 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
960 nvidia,tristate = <TEGRA_PIN_ENABLE>;
961 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
962 };
963 dvfs_clk_px2 {
964 nvidia,pins = "dvfs_clk_px2";
965 nvidia,function = "cldvfs";
966 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
967 nvidia,tristate = <TEGRA_PIN_DISABLE>;
968 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
969 };
970 gpio_x3_aud_px3 {
971 nvidia,pins = "gpio_x3_aud_px3";
972 nvidia,function = "rsvd4";
973 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
974 nvidia,tristate = <TEGRA_PIN_ENABLE>;
975 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
976 };
977 gpio_x4_aud_px4 {
978 nvidia,pins = "gpio_x4_aud_px4";
979 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
980 nvidia,tristate = <TEGRA_PIN_ENABLE>;
981 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
982 };
983 gpio_x5_aud_px5 {
984 nvidia,pins = "gpio_x5_aud_px5";
985 nvidia,function = "rsvd4";
986 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
987 nvidia,tristate = <TEGRA_PIN_ENABLE>;
988 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
989 };
990 gpio_x6_aud_px6 {
991 nvidia,pins = "gpio_x6_aud_px6";
992 nvidia,function = "gmi";
993 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
994 nvidia,tristate = <TEGRA_PIN_ENABLE>;
995 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
996 };
997 gpio_x7_aud_px7 {
998 nvidia,pins = "gpio_x7_aud_px7";
999 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1000 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1001 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1002 };
1003 ulpi_clk_py0 {
1004 nvidia,pins = "ulpi_clk_py0";
1005 nvidia,function = "spi1";
1006 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1007 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1008 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1009 };
1010 ulpi_dir_py1 {
1011 nvidia,pins = "ulpi_dir_py1";
1012 nvidia,function = "spi1";
1013 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1014 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1015 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1016 };
1017 ulpi_nxt_py2 {
1018 nvidia,pins = "ulpi_nxt_py2";
1019 nvidia,function = "spi1";
1020 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1021 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1022 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1023 };
1024 ulpi_stp_py3 {
1025 nvidia,pins = "ulpi_stp_py3";
1026 nvidia,function = "spi1";
1027 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1028 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1029 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1030 };
1031 sdmmc1_dat3_py4 {
1032 nvidia,pins = "sdmmc1_dat3_py4";
1033 nvidia,function = "sdmmc1";
1034 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1035 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1036 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1037 };
1038 sdmmc1_dat2_py5 {
1039 nvidia,pins = "sdmmc1_dat2_py5";
1040 nvidia,function = "sdmmc1";
1041 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1042 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1043 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1044 };
1045 sdmmc1_dat1_py6 {
1046 nvidia,pins = "sdmmc1_dat1_py6";
1047 nvidia,function = "sdmmc1";
1048 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1049 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1050 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1051 };
1052 sdmmc1_dat0_py7 {
1053 nvidia,pins = "sdmmc1_dat0_py7";
1054 nvidia,function = "rsvd2";
1055 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1056 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1057 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1058 };
1059 sdmmc1_clk_pz0 {
1060 nvidia,pins = "sdmmc1_clk_pz0";
1061 nvidia,function = "rsvd3";
1062 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1063 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1064 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1065 };
1066 sdmmc1_cmd_pz1 {
1067 nvidia,pins = "sdmmc1_cmd_pz1";
1068 nvidia,function = "sdmmc1";
1069 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1070 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1071 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1072 };
1073 pwr_i2c_scl_pz6 {
1074 nvidia,pins = "pwr_i2c_scl_pz6";
1075 nvidia,function = "i2cpwr";
1076 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1077 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1078 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1079 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1080 };
1081 pwr_i2c_sda_pz7 {
1082 nvidia,pins = "pwr_i2c_sda_pz7";
1083 nvidia,function = "i2cpwr";
1084 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1085 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1086 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1087 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1088 };
1089 sdmmc4_dat0_paa0 {
1090 nvidia,pins = "sdmmc4_dat0_paa0";
1091 nvidia,function = "sdmmc4";
1092 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1093 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1094 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1095 };
1096 sdmmc4_dat1_paa1 {
1097 nvidia,pins = "sdmmc4_dat1_paa1";
1098 nvidia,function = "sdmmc4";
1099 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1100 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1101 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1102 };
1103 sdmmc4_dat2_paa2 {
1104 nvidia,pins = "sdmmc4_dat2_paa2";
1105 nvidia,function = "sdmmc4";
1106 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1107 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1108 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1109 };
1110 sdmmc4_dat3_paa3 {
1111 nvidia,pins = "sdmmc4_dat3_paa3";
1112 nvidia,function = "sdmmc4";
1113 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1114 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1115 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1116 };
1117 sdmmc4_dat4_paa4 {
1118 nvidia,pins = "sdmmc4_dat4_paa4";
1119 nvidia,function = "sdmmc4";
1120 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1121 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1122 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1123 };
1124 sdmmc4_dat5_paa5 {
1125 nvidia,pins = "sdmmc4_dat5_paa5";
1126 nvidia,function = "sdmmc4";
1127 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1128 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1129 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1130 };
1131 sdmmc4_dat6_paa6 {
1132 nvidia,pins = "sdmmc4_dat6_paa6";
1133 nvidia,function = "sdmmc4";
1134 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1135 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1136 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1137 };
1138 sdmmc4_dat7_paa7 {
1139 nvidia,pins = "sdmmc4_dat7_paa7";
1140 nvidia,function = "sdmmc4";
1141 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1142 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1143 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1144 };
1145 pbb0 {
1146 nvidia,pins = "pbb0";
1147 nvidia,function = "vimclk2_alt";
1148 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1149 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1150 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1151 };
1152 cam_i2c_scl_pbb1 {
1153 nvidia,pins = "cam_i2c_scl_pbb1";
1154 nvidia,function = "i2c3";
1155 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1156 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1157 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1158 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1159 };
1160 cam_i2c_sda_pbb2 {
1161 nvidia,pins = "cam_i2c_sda_pbb2";
1162 nvidia,function = "i2c3";
1163 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1164 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1165 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1166 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1167 };
1168 pbb3 {
1169 nvidia,pins = "pbb3";
1170 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1171 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1172 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1173 };
1174 pbb4 {
1175 nvidia,pins = "pbb4";
1176 nvidia,function = "vgp4";
1177 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1178 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1179 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1180 };
1181 pbb5 {
1182 nvidia,pins = "pbb5";
1183 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1184 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1185 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1186 };
1187 pbb6 {
1188 nvidia,pins = "pbb6";
1189 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1190 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1191 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1192 };
1193 pbb7 {
1194 nvidia,pins = "pbb7";
1195 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1196 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1197 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1198 };
1199 cam_mclk_pcc0 {
1200 nvidia,pins = "cam_mclk_pcc0";
1201 nvidia,function = "vi_alt3";
1202 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1203 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1204 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1205 };
1206 pcc1 {
1207 nvidia,pins = "pcc1";
1208 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1209 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1210 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1211 };
1212 pcc2 {
1213 nvidia,pins = "pcc2";
1214 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1215 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1216 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1217 };
1218 sdmmc4_clk_pcc4 {
1219 nvidia,pins = "sdmmc4_clk_pcc4";
1220 nvidia,function = "sdmmc4";
1221 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1222 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1223 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1224 };
1225 clk2_req_pcc5 {
1226 nvidia,pins = "clk2_req_pcc5";
1227 nvidia,function = "rsvd2";
1228 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1229 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1230 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1231 };
1232 pex_l0_rst_n_pdd1 {
1233 nvidia,pins = "pex_l0_rst_n_pdd1";
1234 nvidia,function = "pe0";
1235 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1236 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1237 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1238 };
1239 pex_l0_clkreq_n_pdd2 {
1240 nvidia,pins = "pex_l0_clkreq_n_pdd2";
1241 nvidia,function = "pe0";
1242 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1243 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1244 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1245 };
1246 pex_wake_n_pdd3 {
1247 nvidia,pins = "pex_wake_n_pdd3";
1248 nvidia,function = "pe";
1249 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1250 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1251 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1252 };
1253 pex_l1_rst_n_pdd5 {
1254 nvidia,pins = "pex_l1_rst_n_pdd5";
1255 nvidia,function = "pe1";
1256 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1257 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1258 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1259 };
1260 pex_l1_clkreq_n_pdd6 {
1261 nvidia,pins = "pex_l1_clkreq_n_pdd6";
1262 nvidia,function = "pe1";
1263 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1264 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1265 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1266 };
1267 clk3_out_pee0 {
1268 nvidia,pins = "clk3_out_pee0";
1269 nvidia,function = "extperiph3";
1270 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1271 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1272 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1273 };
1274 clk3_req_pee1 {
1275 nvidia,pins = "clk3_req_pee1";
1276 nvidia,function = "rsvd2";
1277 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1278 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1279 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1280 };
1281 dap_mclk1_req_pee2 {
1282 nvidia,pins = "dap_mclk1_req_pee2";
1283 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1284 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1285 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1286 };
1287 hdmi_cec_pee3 {
1288 nvidia,pins = "hdmi_cec_pee3";
1289 nvidia,function = "cec";
1290 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1291 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1292 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1293 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1294 };
1295 sdmmc3_clk_lb_out_pee4 {
1296 nvidia,pins = "sdmmc3_clk_lb_out_pee4";
1297 nvidia,function = "sdmmc3";
1298 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1299 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1300 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1301 };
1302 sdmmc3_clk_lb_in_pee5 {
1303 nvidia,pins = "sdmmc3_clk_lb_in_pee5";
1304 nvidia,function = "sdmmc3";
1305 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1306 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1307 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1308 };
1309 dp_hpd_pff0 {
1310 nvidia,pins = "dp_hpd_pff0";
1311 nvidia,function = "dp";
1312 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1313 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1314 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1315 };
1316 usb_vbus_en2_pff1 {
1317 nvidia,pins = "usb_vbus_en2_pff1";
1318 nvidia,function = "rsvd2";
1319 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1320 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1321 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1322 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1323 };
1324 pff2 {
1325 nvidia,pins = "pff2";
1326 nvidia,function = "rsvd2";
1327 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1328 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1329 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1330 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1331 };
1332 core_pwr_req {
1333 nvidia,pins = "core_pwr_req";
1334 nvidia,function = "pwron";
1335 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1336 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1337 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1338 };
1339 cpu_pwr_req {
1340 nvidia,pins = "cpu_pwr_req";
1341 nvidia,function = "cpu";
1342 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1343 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1344 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1345 };
1346 pwr_int_n {
1347 nvidia,pins = "pwr_int_n";
1348 nvidia,function = "pmi";
1349 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1350 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1351 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1352 };
1353 reset_out_n {
1354 nvidia,pins = "reset_out_n";
1355 nvidia,function = "reset_out_n";
1356 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1357 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1358 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1359 };
1360 clk_32k_in {
1361 nvidia,pins = "clk_32k_in";
1362 nvidia,function = "clk";
1363 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1364 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1365 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1366 };
1367 jtag_rtck {
1368 nvidia,pins = "jtag_rtck";
1369 nvidia,function = "rtck";
1370 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1371 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1372 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1373 };
1374 dsi_b {
1375 nvidia,pins = "mipi_pad_ctrl_dsi_b";
1376 nvidia,function = "dsi_b";
1377 };
1378 };
1379 };
1380
1381 /*
1382 * First high speed UART, exposed on the expansion connector J3A2
1383 * Pin 41: BR_UART1_TXD
1384 * Pin 44: BR_UART1_RXD
1385 */
1386 serial@70006000 {
1387 compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1388 reset-names = "serial";
1389 /delete-property/ reg-shift;
1390 status = "okay";
1391 };
1392
1393 /*
1394 * Second high speed UART, exposed on the expansion connector J3A2
1395 * Pin 65: UART2_RXD
1396 * Pin 68: UART2_TXD
1397 * Pin 71: UART2_CTS_L
1398 * Pin 74: UART2_RTS_L
1399 */
1400 serial@70006040 {
1401 compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1402 reset-names = "serial";
1403 /delete-property/ reg-shift;
1404 status = "okay";
1405 };
1406
1407 /* DB9 serial port */
1408 serial@70006300 {
1409 /delete-property/ dmas;
1410 /delete-property/ dma-names;
1411 status = "okay";
1412 };
1413
1414 /* Expansion GEN1_I2C_*, mini-PCIe I2C, on-board components */
1415 i2c@7000c000 {
1416 status = "okay";
1417 clock-frequency = <100000>;
1418
1419 rt5639: audio-codec@1c {
1420 compatible = "realtek,rt5639";
1421 reg = <0x1c>;
1422 interrupt-parent = <&gpio>;
1423 interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
1424 realtek,ldo1-en-gpios =
1425 <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
1426 };
1427
1428 temperature-sensor@4c {
1429 compatible = "ti,tmp451";
1430 reg = <0x4c>;
1431 interrupt-parent = <&gpio>;
1432 interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_EDGE_FALLING>;
1433 };
1434
1435 eeprom@56 {
1436 compatible = "atmel,24c02";
1437 reg = <0x56>;
1438 pagesize = <8>;
1439 };
1440 };
1441
1442 /* Expansion GEN2_I2C_* */
1443 i2c@7000c400 {
1444 status = "okay";
1445 clock-frequency = <100000>;
1446 };
1447
1448 /* Expansion CAM_I2C_* */
1449 i2c@7000c500 {
1450 status = "okay";
1451 clock-frequency = <100000>;
1452 };
1453
1454 /* HDMI DDC */
1455 hdmi_ddc: i2c@7000c700 {
1456 status = "okay";
1457 clock-frequency = <100000>;
1458 };
1459
1460 /* Expansion PWR_I2C_*, on-board components */
1461 i2c@7000d000 {
1462 status = "okay";
1463 clock-frequency = <400000>;
1464
1465 pmic: pmic@40 {
1466 compatible = "ams,as3722";
1467 reg = <0x40>;
1468 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
1469
1470 ams,system-power-controller;
1471
1472 #interrupt-cells = <2>;
1473 interrupt-controller;
1474
1475 gpio-controller;
1476 #gpio-cells = <2>;
1477
1478 pinctrl-names = "default";
1479 pinctrl-0 = <&as3722_default>;
1480
1481 as3722_default: pinmux {
1482 gpio0 {
1483 pins = "gpio0";
1484 function = "gpio";
1485 bias-pull-down;
1486 };
1487
1488 gpio1_2_4_7 {
1489 pins = "gpio1", "gpio2", "gpio4", "gpio7";
1490 function = "gpio";
1491 bias-pull-up;
1492 };
1493
1494 gpio3_5_6 {
1495 pins = "gpio3", "gpio5", "gpio6";
1496 bias-high-impedance;
1497 };
1498 };
1499
1500 regulators {
1501 vsup-sd2-supply = <&vdd_5v0_sys>;
1502 vsup-sd3-supply = <&vdd_5v0_sys>;
1503 vsup-sd4-supply = <&vdd_5v0_sys>;
1504 vsup-sd5-supply = <&vdd_5v0_sys>;
1505 vin-ldo0-supply = <&vdd_1v35_lp0>;
1506 vin-ldo1-6-supply = <&vdd_3v3_run>;
1507 vin-ldo2-5-7-supply = <&vddio_1v8>;
1508 vin-ldo3-4-supply = <&vdd_3v3_sys>;
1509 vin-ldo9-10-supply = <&vdd_5v0_sys>;
1510 vin-ldo11-supply = <&vdd_3v3_run>;
1511
1512 vdd_cpu: sd0 {
1513 regulator-name = "+VDD_CPU_AP";
1514 regulator-min-microvolt = <700000>;
1515 regulator-max-microvolt = <1400000>;
1516 regulator-min-microamp = <3500000>;
1517 regulator-max-microamp = <3500000>;
1518 regulator-always-on;
1519 regulator-boot-on;
1520 ams,ext-control = <2>;
1521 };
1522
1523 sd1 {
1524 regulator-name = "+VDD_CORE";
1525 regulator-min-microvolt = <700000>;
1526 regulator-max-microvolt = <1350000>;
1527 regulator-min-microamp = <2500000>;
1528 regulator-max-microamp = <2500000>;
1529 regulator-always-on;
1530 regulator-boot-on;
1531 ams,ext-control = <1>;
1532 };
1533
1534 vdd_1v35_lp0: sd2 {
1535 regulator-name = "+1.35V_LP0(sd2)";
1536 regulator-min-microvolt = <1350000>;
1537 regulator-max-microvolt = <1350000>;
1538 regulator-always-on;
1539 regulator-boot-on;
1540 };
1541
1542 sd3 {
1543 regulator-name = "+1.35V_LP0(sd3)";
1544 regulator-min-microvolt = <1350000>;
1545 regulator-max-microvolt = <1350000>;
1546 regulator-always-on;
1547 regulator-boot-on;
1548 };
1549
1550 vdd_1v05_run: sd4 {
1551 regulator-name = "+1.05V_RUN";
1552 regulator-min-microvolt = <1050000>;
1553 regulator-max-microvolt = <1050000>;
1554 };
1555
1556 vddio_1v8: sd5 {
1557 regulator-name = "+1.8V_VDDIO";
1558 regulator-min-microvolt = <1800000>;
1559 regulator-max-microvolt = <1800000>;
1560 regulator-boot-on;
1561 regulator-always-on;
1562 };
1563
1564 vdd_gpu: sd6 {
1565 regulator-name = "+VDD_GPU_AP";
1566 regulator-min-microvolt = <650000>;
1567 regulator-max-microvolt = <1200000>;
1568 regulator-min-microamp = <3500000>;
1569 regulator-max-microamp = <3500000>;
1570 regulator-boot-on;
1571 regulator-always-on;
1572 };
1573
1574 avdd_1v05_run: ldo0 {
1575 regulator-name = "+1.05V_RUN_AVDD";
1576 regulator-min-microvolt = <1050000>;
1577 regulator-max-microvolt = <1050000>;
1578 regulator-boot-on;
1579 regulator-always-on;
1580 ams,ext-control = <1>;
1581 };
1582
1583 ldo1 {
1584 regulator-name = "+1.8V_RUN_CAM";
1585 regulator-min-microvolt = <1800000>;
1586 regulator-max-microvolt = <1800000>;
1587 };
1588
1589 ldo2 {
1590 regulator-name = "+1.2V_GEN_AVDD";
1591 regulator-min-microvolt = <1200000>;
1592 regulator-max-microvolt = <1200000>;
1593 regulator-boot-on;
1594 regulator-always-on;
1595 };
1596
1597 ldo3 {
1598 regulator-name = "+1.05V_LP0_VDD_RTC";
1599 regulator-min-microvolt = <1000000>;
1600 regulator-max-microvolt = <1000000>;
1601 regulator-boot-on;
1602 regulator-always-on;
1603 ams,enable-tracking;
1604 };
1605
1606 ldo4 {
1607 regulator-name = "+2.8V_RUN_CAM";
1608 regulator-min-microvolt = <2800000>;
1609 regulator-max-microvolt = <2800000>;
1610 };
1611
1612 ldo5 {
1613 regulator-name = "+1.2V_RUN_CAM_FRONT";
1614 regulator-min-microvolt = <1200000>;
1615 regulator-max-microvolt = <1200000>;
1616 };
1617
1618 vddio_sdmmc3: ldo6 {
1619 regulator-name = "+VDDIO_SDMMC3";
1620 regulator-min-microvolt = <1800000>;
1621 regulator-max-microvolt = <3300000>;
1622 };
1623
1624 ldo7 {
1625 regulator-name = "+1.05V_RUN_CAM_REAR";
1626 regulator-min-microvolt = <1050000>;
1627 regulator-max-microvolt = <1050000>;
1628 };
1629
1630 ldo9 {
1631 regulator-name = "+3.3V_RUN_TOUCH";
1632 regulator-min-microvolt = <2800000>;
1633 regulator-max-microvolt = <2800000>;
1634 };
1635
1636 ldo10 {
1637 regulator-name = "+2.8V_RUN_CAM_AF";
1638 regulator-min-microvolt = <2800000>;
1639 regulator-max-microvolt = <2800000>;
1640 };
1641
1642 ldo11 {
1643 regulator-name = "+1.8V_RUN_VPP_FUSE";
1644 regulator-min-microvolt = <1800000>;
1645 regulator-max-microvolt = <1800000>;
1646 };
1647 };
1648 };
1649 };
1650
1651 /* Expansion TS_SPI_* */
1652 spi@7000d400 {
1653 status = "okay";
1654 };
1655
1656 /* Internal SPI */
1657 spi@7000da00 {
1658 status = "okay";
1659 spi-max-frequency = <25000000>;
1660
1661 flash@0 {
1662 compatible = "winbond,w25q32dw", "jedec,spi-nor";
1663 reg = <0>;
1664 spi-max-frequency = <20000000>;
1665 };
1666 };
1667
1668 pmc@7000e400 {
1669 nvidia,invert-interrupt;
1670 nvidia,suspend-mode = <1>;
1671 nvidia,cpu-pwr-good-time = <500>;
1672 nvidia,cpu-pwr-off-time = <300>;
1673 nvidia,core-pwr-good-time = <641 3845>;
1674 nvidia,core-pwr-off-time = <61036>;
1675 nvidia,core-power-req-active-high;
1676 nvidia,sys-clock-req-active-high;
1677
1678 i2c-thermtrip {
1679 nvidia,i2c-controller-id = <4>;
1680 nvidia,bus-addr = <0x40>;
1681 nvidia,reg-addr = <0x36>;
1682 nvidia,reg-data = <0x2>;
1683 };
1684 };
1685
1686 cec@70015000 {
1687 status = "okay";
1688 };
1689
1690 /* Serial ATA */
1691 sata@70020000 {
1692 status = "okay";
1693
1694 phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
1695 phy-names = "sata-0";
1696
1697 hvdd-supply = <&vdd_3v3_lp0>;
1698 vddio-supply = <&vdd_1v05_run>;
1699 avdd-supply = <&vdd_1v05_run>;
1700
1701 target-5v-supply = <&vdd_5v0_sata>;
1702 target-12v-supply = <&vdd_12v0_sata>;
1703 };
1704
1705 hda@70030000 {
1706 status = "okay";
1707 };
1708
1709 usb@70090000 {
1710 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* Micro A/B */
1711 <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Mini PCIe */
1712 <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* USB3 */
1713 <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>; /* USB3 */
1714 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0";
1715
1716 avddio-pex-supply = <&vdd_1v05_run>;
1717 dvddio-pex-supply = <&vdd_1v05_run>;
1718 avdd-usb-supply = <&vdd_3v3_lp0>;
1719 avdd-pll-utmip-supply = <&vddio_1v8>;
1720 avdd-pll-erefe-supply = <&avdd_1v05_run>;
1721 avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
1722 hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
1723 hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
1724
1725 status = "okay";
1726 };
1727
1728 padctl@7009f000 {
1729 status = "okay";
1730
1731 avdd-pll-utmip-supply = <&vddio_1v8>;
1732 avdd-pll-erefe-supply = <&avdd_1v05_run>;
1733 avdd-pex-pll-supply = <&vdd_1v05_run>;
1734 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
1735
1736 pads {
1737 usb2 {
1738 status = "okay";
1739
1740 lanes {
1741 usb2-0 {
1742 nvidia,function = "snps";
1743 status = "okay";
1744 };
1745
1746 usb2-1 {
1747 nvidia,function = "xusb";
1748 status = "okay";
1749 };
1750
1751 usb2-2 {
1752 nvidia,function = "xusb";
1753 status = "okay";
1754 };
1755 };
1756 };
1757
1758 pcie {
1759 status = "okay";
1760
1761 lanes {
1762 pcie-0 {
1763 nvidia,function = "usb3-ss";
1764 status = "okay";
1765 };
1766
1767 pcie-2 {
1768 nvidia,function = "pcie";
1769 status = "okay";
1770 };
1771
1772 pcie-4 {
1773 nvidia,function = "pcie";
1774 status = "okay";
1775 };
1776 };
1777 };
1778
1779 sata {
1780 status = "okay";
1781
1782 lanes {
1783 sata-0 {
1784 nvidia,function = "sata";
1785 status = "okay";
1786 };
1787 };
1788 };
1789 };
1790
1791 ports {
1792 /* Micro A/B */
1793 usb2-0 {
1794 status = "okay";
1795 mode = "host";
1796 };
1797
1798 /* Mini PCIe */
1799 usb2-1 {
1800 status = "okay";
1801 mode = "host";
1802 };
1803
1804 /* USB3 */
1805 usb2-2 {
1806 status = "okay";
1807 mode = "host";
1808
1809 vbus-supply = <&vdd_usb3_vbus>;
1810 };
1811
1812 usb3-0 {
1813 nvidia,usb2-companion = <2>;
1814 status = "okay";
1815 };
1816 };
1817 };
1818
1819 /* SD card */
1820 mmc@700b0400 {
1821 status = "okay";
1822 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1823 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1824 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1825 bus-width = <4>;
1826 vqmmc-supply = <&vddio_sdmmc3>;
1827 };
1828
1829 /* eMMC */
1830 mmc@700b0600 {
1831 status = "okay";
1832 bus-width = <8>;
1833 non-removable;
1834 };
1835
1836 /* CPU DFLL clock */
1837 clock@70110000 {
1838 status = "okay";
1839 vdd-cpu-supply = <&vdd_cpu>;
1840 nvidia,i2c-fs-rate = <400000>;
1841 };
1842
1843 ahub@70300000 {
1844 i2s@70301100 {
1845 status = "okay";
1846 };
1847 };
1848
1849 usb@7d000000 {
1850 compatible = "nvidia,tegra124-udc";
1851 status = "okay";
1852 dr_mode = "peripheral";
1853 };
1854
1855 usb-phy@7d000000 {
1856 status = "okay";
1857 };
1858
1859 /* mini-PCIe USB */
1860 usb@7d004000 {
1861 status = "okay";
1862 };
1863
1864 usb-phy@7d004000 {
1865 status = "okay";
1866 };
1867
1868 /* USB A connector */
1869 usb@7d008000 {
1870 status = "okay";
1871 };
1872
1873 usb-phy@7d008000 {
1874 status = "okay";
1875 vbus-supply = <&vdd_usb3_vbus>;
1876 };
1877
1878 clk32k_in: clock-32k {
1879 compatible = "fixed-clock";
1880 clock-frequency = <32768>;
1881 #clock-cells = <0>;
1882 };
1883
1884 cpus {
1885 cpu@0 {
1886 vdd-cpu-supply = <&vdd_cpu>;
1887 };
1888 };
1889
1890 gpio-keys {
1891 compatible = "gpio-keys";
1892
1893 key-power {
1894 label = "Power";
1895 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1896 linux,code = <KEY_POWER>;
1897 debounce-interval = <10>;
1898 wakeup-source;
1899 };
1900 };
1901
1902 vdd_mux: regulator-mux {
1903 compatible = "regulator-fixed";
1904 regulator-name = "+VDD_MUX";
1905 regulator-min-microvolt = <12000000>;
1906 regulator-max-microvolt = <12000000>;
1907 regulator-always-on;
1908 regulator-boot-on;
1909 };
1910
1911 vdd_5v0_sys: regulator-5v0sys {
1912 compatible = "regulator-fixed";
1913 regulator-name = "+5V_SYS";
1914 regulator-min-microvolt = <5000000>;
1915 regulator-max-microvolt = <5000000>;
1916 regulator-always-on;
1917 regulator-boot-on;
1918 vin-supply = <&vdd_mux>;
1919 };
1920
1921 vdd_3v3_sys: regulator-3v3sys {
1922 compatible = "regulator-fixed";
1923 regulator-name = "+3.3V_SYS";
1924 regulator-min-microvolt = <3300000>;
1925 regulator-max-microvolt = <3300000>;
1926 regulator-always-on;
1927 regulator-boot-on;
1928 vin-supply = <&vdd_mux>;
1929 };
1930
1931 vdd_3v3_run: regulator-3v3run {
1932 compatible = "regulator-fixed";
1933 regulator-name = "+3.3V_RUN";
1934 regulator-min-microvolt = <3300000>;
1935 regulator-max-microvolt = <3300000>;
1936 regulator-always-on;
1937 regulator-boot-on;
1938 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1939 enable-active-high;
1940 vin-supply = <&vdd_3v3_sys>;
1941 };
1942
1943 vdd_3v3_hdmi: regulator-3v3hdmi {
1944 compatible = "regulator-fixed";
1945 regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1946 regulator-min-microvolt = <3300000>;
1947 regulator-max-microvolt = <3300000>;
1948 vin-supply = <&vdd_3v3_run>;
1949 };
1950
1951 vdd_usb1_vbus: regulator-usb1 {
1952 compatible = "regulator-fixed";
1953 regulator-name = "+USB0_VBUS_SW";
1954 regulator-min-microvolt = <5000000>;
1955 regulator-max-microvolt = <5000000>;
1956 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1957 enable-active-high;
1958 gpio-open-drain;
1959 vin-supply = <&vdd_5v0_sys>;
1960 };
1961
1962 vdd_usb3_vbus: regulator-usb3 {
1963 compatible = "regulator-fixed";
1964 regulator-name = "+5V_USB_HS";
1965 regulator-min-microvolt = <5000000>;
1966 regulator-max-microvolt = <5000000>;
1967 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1968 enable-active-high;
1969 gpio-open-drain;
1970 vin-supply = <&vdd_5v0_sys>;
1971 };
1972
1973 vdd_3v3_lp0: regulator-lp0 {
1974 compatible = "regulator-fixed";
1975 regulator-name = "+3.3V_LP0";
1976 regulator-min-microvolt = <3300000>;
1977 regulator-max-microvolt = <3300000>;
1978 regulator-always-on;
1979 regulator-boot-on;
1980 gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1981 enable-active-high;
1982 vin-supply = <&vdd_3v3_sys>;
1983 };
1984
1985 vdd_hdmi_pll: regulator-hdmipll {
1986 compatible = "regulator-fixed";
1987 regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1988 regulator-min-microvolt = <1050000>;
1989 regulator-max-microvolt = <1050000>;
1990 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1991 vin-supply = <&vdd_1v05_run>;
1992 };
1993
1994 vdd_5v0_hdmi: regulator-hdmicon {
1995 compatible = "regulator-fixed";
1996 regulator-name = "+5V_HDMI_CON";
1997 regulator-min-microvolt = <5000000>;
1998 regulator-max-microvolt = <5000000>;
1999 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
2000 enable-active-high;
2001 vin-supply = <&vdd_5v0_sys>;
2002 };
2003
2004 /* Molex power connector */
2005 vdd_5v0_sata: regulator-5v0sata {
2006 compatible = "regulator-fixed";
2007 regulator-name = "+5V_SATA";
2008 regulator-min-microvolt = <5000000>;
2009 regulator-max-microvolt = <5000000>;
2010 gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
2011 enable-active-high;
2012 vin-supply = <&vdd_5v0_sys>;
2013 };
2014
2015 vdd_12v0_sata: regulator-12v0sata {
2016 compatible = "regulator-fixed";
2017 regulator-name = "+12V_SATA";
2018 regulator-min-microvolt = <12000000>;
2019 regulator-max-microvolt = <12000000>;
2020 gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
2021 enable-active-high;
2022 vin-supply = <&vdd_mux>;
2023 };
2024
2025 sound {
2026 compatible = "nvidia,tegra-audio-rt5640-jetson-tk1",
2027 "nvidia,tegra-audio-rt5640";
2028 nvidia,model = "NVIDIA Tegra Jetson TK1";
2029
2030 nvidia,audio-routing =
2031 "Headphones", "HPOR",
2032 "Headphones", "HPOL",
2033 "Mic Jack", "MICBIAS1",
2034 "IN2P", "Mic Jack";
2035
2036 nvidia,i2s-controller = <&tegra_i2s1>;
2037 nvidia,audio-codec = <&rt5639>;
2038
2039 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_LOW>;
2040
2041 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
2042 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2043 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2044 clock-names = "pll_a", "pll_a_out0", "mclk";
2045
2046 assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
2047 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2048
2049 assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2050 <&tegra_car TEGRA124_CLK_EXTERN1>;
2051 };
2052
2053 thermal-zones {
2054 cpu-thermal {
2055 trips {
2056 cpu-shutdown-trip {
2057 temperature = <101000>;
2058 hysteresis = <0>;
2059 type = "critical";
2060 };
2061 };
2062 };
2063
2064 mem-thermal {
2065 trips {
2066 mem-shutdown-trip {
2067 temperature = <101000>;
2068 hysteresis = <0>;
2069 type = "critical";
2070 };
2071 };
2072 };
2073
2074 gpu-thermal {
2075 trips {
2076 gpu-shutdown-trip {
2077 temperature = <101000>;
2078 hysteresis = <0>;
2079 type = "critical";
2080 };
2081 };
2082 };
2083 };
2084};