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git01.mediatek.com / filogic / uboot / c31f901b7c095a32d4809608d6598ecd8fee50e4 / . / dts / upstream / src / arm / microchip / at91sam9260.dtsi
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Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
4 *
5 * Copyright (C) 2011 Atmel,
6 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
7 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/clock/at91.h>
14#include <dt-bindings/mfd/at91-usart.h>
15
16/ {
17 #address-cells = <1>;
18 #size-cells = <1>;
19 model = "Atmel AT91SAM9260 family SoC";
20 compatible = "atmel,at91sam9260";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
25 serial1 = &usart0;
26 serial2 = &usart1;
27 serial3 = &usart2;
28 serial4 = &usart3;
29 serial5 = &uart0;
30 serial6 = &uart1;
31 gpio0 = &pioA;
32 gpio1 = &pioB;
33 gpio2 = &pioC;
34 tcb0 = &tcb0;
35 tcb1 = &tcb1;
36 i2c0 = &i2c0;
37 ssc0 = &ssc0;
38 };
39 cpus {
40 #address-cells = <1>;
41 #size-cells = <0>;
42
43 cpu@0 {
44 compatible = "arm,arm926ej-s";
45 device_type = "cpu";
46 reg = <0>;
47 };
48 };
49
50 memory@20000000 {
51 device_type = "memory";
52 reg = <0x20000000 0x04000000>;
53 };
54
55 clocks {
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <0>;
60 };
61
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
64 #clock-cells = <0>;
65 clock-frequency = <0>;
66 };
67
68 adc_op_clk: adc_op_clk {
69 compatible = "fixed-clock";
70 #clock-cells = <0>;
71 clock-frequency = <5000000>;
72 };
73 };
74
75 sram0: sram@2ff000 {
76 compatible = "mmio-sram";
77 reg = <0x002ff000 0x2000>;
78 #address-cells = <1>;
79 #size-cells = <1>;
80 ranges = <0 0x002ff000 0x2000>;
81 };
82
83 ahb {
84 compatible = "simple-bus";
85 #address-cells = <1>;
86 #size-cells = <1>;
87 ranges;
88
89 apb {
90 compatible = "simple-bus";
91 #address-cells = <1>;
92 #size-cells = <1>;
93 ranges;
94
95 aic: interrupt-controller@fffff000 {
96 #interrupt-cells = <3>;
97 compatible = "atmel,at91rm9200-aic";
98 interrupt-controller;
99 reg = <0xfffff000 0x200>;
100 atmel,external-irqs = <29 30 31>;
101 };
102
103 ramc0: ramc@ffffea00 {
104 compatible = "atmel,at91sam9260-sdramc";
105 reg = <0xffffea00 0x200>;
106 };
107
108 smc: smc@ffffec00 {
109 compatible = "atmel,at91sam9260-smc", "syscon";
110 reg = <0xffffec00 0x200>;
111 };
112
113 matrix: matrix@ffffee00 {
114 compatible = "atmel,at91sam9260-matrix", "syscon";
115 reg = <0xffffee00 0x200>;
116 };
117
118 pmc: clock-controller@fffffc00 {
119 compatible = "atmel,at91sam9260-pmc", "syscon";
120 reg = <0xfffffc00 0x100>;
121 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
122 #clock-cells = <2>;
123 clocks = <&slow_xtal>, <&main_xtal>;
124 clock-names = "slow_xtal", "main_xtal";
125 };
126
127 reset-controller@fffffd00 {
128 compatible = "atmel,at91sam9260-rstc";
129 reg = <0xfffffd00 0x10>;
130 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
131 };
132
133 shdwc: poweroff@fffffd10 {
134 compatible = "atmel,at91sam9260-shdwc";
135 reg = <0xfffffd10 0x10>;
136 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
137 };
138
139 pit: timer@fffffd30 {
140 compatible = "atmel,at91sam9260-pit";
141 reg = <0xfffffd30 0xf>;
142 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
143 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
144 };
145
146 tcb0: timer@fffa0000 {
147 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
148 #address-cells = <1>;
149 #size-cells = <0>;
150 reg = <0xfffa0000 0x100>;
151 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
152 <18 IRQ_TYPE_LEVEL_HIGH 0>,
153 <19 IRQ_TYPE_LEVEL_HIGH 0>;
154 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
155 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
156 };
157
158 tcb1: timer@fffdc000 {
159 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
160 #address-cells = <1>;
161 #size-cells = <0>;
162 reg = <0xfffdc000 0x100>;
163 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>,
164 <27 IRQ_TYPE_LEVEL_HIGH 0>,
165 <28 IRQ_TYPE_LEVEL_HIGH 0>;
166 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
167 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
168 };
169
170 pinctrl: pinctrl@fffff400 {
171 #address-cells = <1>;
172 #size-cells = <1>;
173 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
174 ranges = <0xfffff400 0xfffff400 0x600>;
175
176 atmel,mux-mask = <
177 /* A B */
178 0xffffffff 0xffc00c3b /* pioA */
179 0xffffffff 0x7fff3ccf /* pioB */
180 0xffffffff 0x007fffff /* pioC */
181 >;
182
183 /* shared pinctrl settings */
184 dbgu {
185 pinctrl_dbgu: dbgu-0 {
186 atmel,pins =
187 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
188 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
189 };
190 };
191
192 usart0 {
193 pinctrl_usart0: usart0-0 {
194 atmel,pins =
195 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
196 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
197 };
198
199 pinctrl_usart0_rts: usart0_rts-0 {
200 atmel,pins =
201 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
202 };
203
204 pinctrl_usart0_cts: usart0_cts-0 {
205 atmel,pins =
206 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
207 };
208
209 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
210 atmel,pins =
211 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
212 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
213 };
214
215 pinctrl_usart0_dcd: usart0_dcd-0 {
216 atmel,pins =
217 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
218 };
219
220 pinctrl_usart0_ri: usart0_ri-0 {
221 atmel,pins =
222 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
223 };
224 };
225
226 usart1 {
227 pinctrl_usart1: usart1-0 {
228 atmel,pins =
229 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
230 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
231 };
232
233 pinctrl_usart1_rts: usart1_rts-0 {
234 atmel,pins =
235 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
236 };
237
238 pinctrl_usart1_cts: usart1_cts-0 {
239 atmel,pins =
240 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
241 };
242 };
243
244 usart2 {
245 pinctrl_usart2: usart2-0 {
246 atmel,pins =
247 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
248 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
249 };
250
251 pinctrl_usart2_rts: usart2_rts-0 {
252 atmel,pins =
253 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
254 };
255
256 pinctrl_usart2_cts: usart2_cts-0 {
257 atmel,pins =
258 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
259 };
260 };
261
262 usart3 {
263 pinctrl_usart3: usart3-0 {
264 atmel,pins =
265 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
266 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
267 };
268
269 pinctrl_usart3_rts: usart3_rts-0 {
270 atmel,pins =
271 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
272 };
273
274 pinctrl_usart3_cts: usart3_cts-0 {
275 atmel,pins =
276 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
277 };
278 };
279
280 uart0 {
281 pinctrl_uart0: uart0-0 {
282 atmel,pins =
283 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP
284 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
285 };
286 };
287
288 uart1 {
289 pinctrl_uart1: uart1-0 {
290 atmel,pins =
291 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
292 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
293 };
294 };
295
296 nand {
297 pinctrl_nand_rb: nand-rb-0 {
298 atmel,pins =
299 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
300 };
301
302 pinctrl_nand_cs: nand-cs-0 {
303 atmel,pins =
304 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
305 };
306 };
307
308 macb {
309 pinctrl_macb_rmii: macb_rmii-0 {
310 atmel,pins =
311 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
312 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
313 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
314 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
315 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
316 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
317 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
318 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
319 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
320 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
321 };
322
323 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
324 atmel,pins =
325 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
326 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
327 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
328 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
329 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
330 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
331 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
332 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
333 };
334
335 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
336 atmel,pins =
337 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
338 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
339 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
340 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
341 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
342 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
343 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
344 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
345 };
346 };
347
348 mmc0 {
349 pinctrl_mmc0_clk: mmc0_clk-0 {
350 atmel,pins =
351 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
352 };
353
354 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
355 atmel,pins =
356 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
357 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
358 };
359
360 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
361 atmel,pins =
362 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
363 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
364 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
365 };
366
367 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
368 atmel,pins =
369 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
370 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
371 };
372
373 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
374 atmel,pins =
375 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
376 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
377 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
378 };
379 };
380
381 ssc0 {
382 pinctrl_ssc0_tx: ssc0_tx-0 {
383 atmel,pins =
384 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
385 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
386 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
387 };
388
389 pinctrl_ssc0_rx: ssc0_rx-0 {
390 atmel,pins =
391 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
392 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
393 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
394 };
395 };
396
397 spi0 {
398 pinctrl_spi0: spi0-0 {
399 atmel,pins =
400 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
401 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
402 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
403 };
404 };
405
406 spi1 {
407 pinctrl_spi1: spi1-0 {
408 atmel,pins =
409 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
410 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
411 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
412 };
413 };
414
415 i2c_gpio0 {
416 pinctrl_i2c_gpio0: i2c_gpio0-0 {
417 atmel,pins =
418 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
419 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
420 };
421 };
422
423 tcb0 {
424 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
425 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
426 };
427
428 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
429 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
430 };
431
432 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
433 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
434 };
435
436 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
437 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
438 };
439
440 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
441 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
442 };
443
444 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
445 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
446 };
447
448 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
449 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
450 };
451
452 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
453 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
454 };
455
456 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
457 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
458 };
459 };
460
461 tcb1 {
462 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
463 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
464 };
465
466 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
467 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
468 };
469
470 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
471 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
472 };
473
474 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
475 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
476 };
477
478 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
479 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
480 };
481
482 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
483 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
484 };
485
486 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
487 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
488 };
489
490 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
491 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
492 };
493
494 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
495 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
496 };
497 };
498
499 pioA: gpio@fffff400 {
500 compatible = "atmel,at91rm9200-gpio";
501 reg = <0xfffff400 0x200>;
502 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
503 #gpio-cells = <2>;
504 gpio-controller;
505 interrupt-controller;
506 #interrupt-cells = <2>;
507 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
508 };
509
510 pioB: gpio@fffff600 {
511 compatible = "atmel,at91rm9200-gpio";
512 reg = <0xfffff600 0x200>;
513 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
514 #gpio-cells = <2>;
515 gpio-controller;
516 interrupt-controller;
517 #interrupt-cells = <2>;
518 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
519 };
520
521 pioC: gpio@fffff800 {
522 compatible = "atmel,at91rm9200-gpio";
523 reg = <0xfffff800 0x200>;
524 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
525 #gpio-cells = <2>;
526 gpio-controller;
527 interrupt-controller;
528 #interrupt-cells = <2>;
529 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
530 };
531 };
532
533 dbgu: serial@fffff200 {
534 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
535 reg = <0xfffff200 0x200>;
536 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
537 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
538 pinctrl-names = "default";
539 pinctrl-0 = <&pinctrl_dbgu>;
540 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
541 clock-names = "usart";
542 status = "disabled";
543 };
544
545 usart0: serial@fffb0000 {
546 compatible = "atmel,at91sam9260-usart";
547 reg = <0xfffb0000 0x200>;
548 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
549 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
550 atmel,use-dma-rx;
551 atmel,use-dma-tx;
552 pinctrl-names = "default";
553 pinctrl-0 = <&pinctrl_usart0>;
554 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
555 clock-names = "usart";
556 status = "disabled";
557 };
558
559 usart1: serial@fffb4000 {
560 compatible = "atmel,at91sam9260-usart";
561 reg = <0xfffb4000 0x200>;
562 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
563 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
564 atmel,use-dma-rx;
565 atmel,use-dma-tx;
566 pinctrl-names = "default";
567 pinctrl-0 = <&pinctrl_usart1>;
568 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
569 clock-names = "usart";
570 status = "disabled";
571 };
572
573 usart2: serial@fffb8000 {
574 compatible = "atmel,at91sam9260-usart";
575 reg = <0xfffb8000 0x200>;
576 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
577 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
578 atmel,use-dma-rx;
579 atmel,use-dma-tx;
580 pinctrl-names = "default";
581 pinctrl-0 = <&pinctrl_usart2>;
582 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
583 clock-names = "usart";
584 status = "disabled";
585 };
586
587 usart3: serial@fffd0000 {
588 compatible = "atmel,at91sam9260-usart";
589 reg = <0xfffd0000 0x200>;
590 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
591 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
592 atmel,use-dma-rx;
593 atmel,use-dma-tx;
594 pinctrl-names = "default";
595 pinctrl-0 = <&pinctrl_usart3>;
596 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
597 clock-names = "usart";
598 status = "disabled";
599 };
600
601 uart0: serial@fffd4000 {
602 compatible = "atmel,at91sam9260-usart";
603 reg = <0xfffd4000 0x200>;
604 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
605 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
606 atmel,use-dma-rx;
607 atmel,use-dma-tx;
608 pinctrl-names = "default";
609 pinctrl-0 = <&pinctrl_uart0>;
610 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
611 clock-names = "usart";
612 status = "disabled";
613 };
614
615 uart1: serial@fffd8000 {
616 compatible = "atmel,at91sam9260-usart";
617 reg = <0xfffd8000 0x200>;
618 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
619 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
620 atmel,use-dma-rx;
621 atmel,use-dma-tx;
622 pinctrl-names = "default";
623 pinctrl-0 = <&pinctrl_uart1>;
624 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
625 clock-names = "usart";
626 status = "disabled";
627 };
628
629 macb0: ethernet@fffc4000 {
630 compatible = "cdns,at91sam9260-macb", "cdns,macb";
631 reg = <0xfffc4000 0x100>;
632 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
633 pinctrl-names = "default";
634 pinctrl-0 = <&pinctrl_macb_rmii>;
635 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
636 clock-names = "hclk", "pclk";
637 status = "disabled";
638 };
639
640 usb1: gadget@fffa4000 {
641 compatible = "atmel,at91sam9260-udc";
642 reg = <0xfffa4000 0x4000>;
643 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
644 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
645 clock-names = "pclk", "hclk";
646 status = "disabled";
647 };
648
649 i2c0: i2c@fffac000 {
650 compatible = "atmel,at91sam9260-i2c";
651 reg = <0xfffac000 0x100>;
652 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
653 #address-cells = <1>;
654 #size-cells = <0>;
655 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
656 status = "disabled";
657 };
658
659 mmc0: mmc@fffa8000 {
660 compatible = "atmel,hsmci";
661 reg = <0xfffa8000 0x600>;
662 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
663 #address-cells = <1>;
664 #size-cells = <0>;
665 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
666 clock-names = "mci_clk";
667 status = "disabled";
668 };
669
670 ssc0: ssc@fffbc000 {
671 compatible = "atmel,at91rm9200-ssc";
672 reg = <0xfffbc000 0x4000>;
673 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
674 pinctrl-names = "default";
675 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
676 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
677 clock-names = "pclk";
678 status = "disabled";
679 };
680
681 spi0: spi@fffc8000 {
682 #address-cells = <1>;
683 #size-cells = <0>;
684 compatible = "atmel,at91rm9200-spi";
685 reg = <0xfffc8000 0x200>;
686 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
687 pinctrl-names = "default";
688 pinctrl-0 = <&pinctrl_spi0>;
689 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
690 clock-names = "spi_clk";
691 status = "disabled";
692 };
693
694 spi1: spi@fffcc000 {
695 #address-cells = <1>;
696 #size-cells = <0>;
697 compatible = "atmel,at91rm9200-spi";
698 reg = <0xfffcc000 0x200>;
699 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
700 pinctrl-names = "default";
701 pinctrl-0 = <&pinctrl_spi1>;
702 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
703 clock-names = "spi_clk";
704 status = "disabled";
705 };
706
707 adc0: adc@fffe0000 {
708 compatible = "atmel,at91sam9260-adc";
709 reg = <0xfffe0000 0x100>;
710 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
711 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&adc_op_clk>;
712 clock-names = "adc_clk", "adc_op_clk";
713 atmel,adc-use-external-triggers;
714 atmel,adc-channels-used = <0xf>;
715 atmel,adc-vref = <3300>;
716 atmel,adc-startup-time = <15>;
717 };
718
719 rtc@fffffd20 {
720 compatible = "atmel,at91sam9260-rtt";
721 reg = <0xfffffd20 0x10>;
722 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
723 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
724 status = "disabled";
725 };
726
727 watchdog: watchdog@fffffd40 {
728 compatible = "atmel,at91sam9260-wdt";
729 reg = <0xfffffd40 0x10>;
730 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
731 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
732 atmel,watchdog-type = "hardware";
733 atmel,reset-type = "all";
734 atmel,dbg-halt;
735 status = "disabled";
736 };
737
738 gpbr: syscon@fffffd50 {
739 compatible = "atmel,at91sam9260-gpbr", "syscon";
740 reg = <0xfffffd50 0x10>;
741 status = "disabled";
742 };
743 };
744
745 usb0: ohci@500000 {
746 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
747 reg = <0x00500000 0x100000>;
748 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
749 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 6>;
750 clock-names = "ohci_clk", "hclk", "uhpck";
751 status = "disabled";
752 };
753
754 ebi: ebi@10000000 {
755 compatible = "atmel,at91sam9260-ebi";
756 #address-cells = <2>;
757 #size-cells = <1>;
758 atmel,smc = <&smc>;
759 atmel,matrix = <&matrix>;
760 reg = <0x10000000 0x80000000>;
761 ranges = <0x0 0x0 0x10000000 0x10000000
762 0x1 0x0 0x20000000 0x10000000
763 0x2 0x0 0x30000000 0x10000000
764 0x3 0x0 0x40000000 0x10000000
765 0x4 0x0 0x50000000 0x10000000
766 0x5 0x0 0x60000000 0x10000000
767 0x6 0x0 0x70000000 0x10000000
768 0x7 0x0 0x80000000 0x10000000>;
769 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
770 status = "disabled";
771
772 nand_controller: nand-controller {
773 compatible = "atmel,at91sam9260-nand-controller";
774 #address-cells = <2>;
775 #size-cells = <1>;
776 ranges;
777 status = "disabled";
778 };
779 };
780 };
781
782 i2c_gpio0: i2c-gpio-0 {
783 compatible = "i2c-gpio";
784 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
785 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
786 >;
787 i2c-gpio,sda-open-drain;
788 i2c-gpio,scl-open-drain;
789 i2c-gpio,delay-us = <2>; /* ~100 kHz */
790 #address-cells = <1>;
791 #size-cells = <0>;
792 pinctrl-names = "default";
793 pinctrl-0 = <&pinctrl_i2c_gpio0>;
794 status = "disabled";
795 };
796};